81
M24C32WMN6TP (DIGITAL : IC712)
ADV7623 (DIGITAL : IC721)
M24128, M24C64, M24C32
Description
7/39
Figure 2.
DIP, SO, TSSOP and UFDFPN connections
1. See
Package mechanical data
section for package dimensions, and how to identify pin-1.
Figure 3.
M24128 WLCSP connections (top view, marking side, with balls on the
underside)
Table 2.
Signal names
Signal name
Function
Direction
E0, E1, E2
Chip Enable
Input
SDA
Serial Data
I/O
SCL
Serial Clock
Input
WC
Write Control
Input
V
CC
Supply voltage
V
SS
Ground
SDA
VSS
SCL
WC
E1
E0
VCC
E2
AI01845e
M24128
M24C64
M24C32
1
2
3
4
8
7
6
5
V
CC
E1
E0
WC
E2
SDA
SCL
V
SS
ai14799
ADV7623 Hardware Manual
Rev. 0 – March 2010
16
Confidential NDA required
2.7 Pin Description
D
DC
C_S
D
A
5V
_D
E
TC
H
P
_CT
R
LC
RX
B_2
+
RX
B_2
-
TVDD
RX
B_1
+
RX
B_1
-
CGN
D
RX
B_0
+
RX
B_0
-
TVDD
RX
B_C
+
RX
B_C
-
CGN
D
C
V
DD
DD
CB
_S
CL
DD
CB
_S
DA
D
V
DD
DGN
D
5V
_D
E
TB
H
P
_CT
R
LB
RX
A_2
+
RX
A_2
-
TVDD
RX
A_1
+
RX
A_1
-
CGN
D
RX
A_0
+
RX
A_0
-
TVDD
RX
A_C
+
RX
A_C
-
CGN
D
C
V
DD
DD
CA
_S
CL
144
143
142
141
140
139
138
137
136
135
134
133
132
131
130
129
128
127
126
125
124
123
122
121
120
119
118
117
116
115
114
113
112
111
110
109
DDCC_SCL 1
108 DDCA_SDA
CVDD 2
107 RTERM
CGND 3
106 5V_DETA
RXC_C- 4
105 HP_CTRLA
RXC_C+ 5
104 PGND
TVDD 6
103 PVDD
RXC_0- 7
102 XTAL1
RXC_0+ 8
101 XTAL
CGND 9
100 PVDD
RXC_1- 10
99 PGND
RXC_1+ 11
98 PWRDNB
TVDD 12
97 RESETB
RXC_2- 13
96 MCLK_OUT
RXC_2+ 14
95 SCLK_OUT
HP_CTRLD 15
94 AP5_OUT
5V_DETD 16
93 DVDD
DGND 17
92 DGND
DVDD 18
91 AP4_OUT
DDCD_SDA 19
90 AP3_OUT
DDCD_SCL 20
89 AP2_OUT
CVDD 21
88 AP1_OUT
CGND 22
87 AP0_OUT
RXD_C- 23
86 DVDDIO
RXD_C+ 24
85 DGNDIO
TVDD 25
84 INT_TX
RXD_0- 26
83 INT2
RXD_0+ 27
82 INT1
CGND 28
81 DVDD
RXD_1- 29
80 DGND
RXD_1+ 30
79 SCL
TVDD 31
78 SDATA
RXD_2- 32
77 AP0_IN
RXD_2+ 33
76 AP1_IN
CVDD 34
75 AP2_IN
CGND 35
74 AP3_IN
TXPVDD 36
73 DVDDIO
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
TX
PLVDD
TXPGND
TXPLGND
EXT_SW
ING
HPD
_A
R
C-
ARC
+
TX
D
DC_
SD
A
TX
DD
C
_S
CL
TXA
V
D
D
TXGN
D
TXC
-
TX
C
+
TXGN
D
TX
0-
TX
0+
TXGN
D
TX
1-
TX
1+
TXA
V
D
D
TX
2-
TX
2+
TXGN
D
C
EC
DGN
D
DVDD
ALSB
CSB
EP_S
C
K
E
P_
C
S
EP_
M
O
SI
EP_
M
ISO
M
C
LK
_I
N
S
C
LK
_I
N
AP
5_
IN
AP
4_
IN
DG
ND
IO
Figure 3: ADV7623 Pin Configuration
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