Denon AVR-1604, Service Manual

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15
15
AVR-1604/684 / AVC-1580
Function
Pin
No.
Pin Name I/O
* For latch-up countermeasure, perform each power supply ON/OFF in the same timing.
28 XOUT O X’tal osc. connecting output terminal
29 XIN I X’tal osc. connection, external clock input terminal (24.576MHz or 12.288MHz)
30 DVDD — Digital power
31 DGND — Digital GND
32 EMPHA/UO I/O Emphasis information/U-data output/Chip address setting terminal
33 AUDIO/VO I/O Non-PCM detect/V-flag output/ Chip address setting terminal
34 CKST I/O Clock switch transition period output/Demodulation master or slave function switching terminal
35 INT I/O Interrupt output for
µ
com (Interrupt factor selectable)/Modulation or general I/O switching terminal
36 RERR O PLL lock error, data error flag output
37 DO O
µ
com I/F, read out data output terminal (3-state)
38 DI I
5
µ
com I/F, write data input terminal
39 CE I
5
µ
com I/F, chip enable input terminal
40 CL I
5
µ
com I/F, clock input terminal
41 XMODE I
5
System reset input terminal
42 DGND — Digital GND
43 DVDD — Digital power
44 TMCK/PIO0 I/O 256fs system clock input for modulation/General I/O in/output terminal
45 TBCK/PIO1 I/O 64fs bit clock input for modulation/General I/O in/output terminal
46 TLRCK/PIO2 I/O fs clock input for modulation/General I/O in/output terminal
47 TDATA/PIO3 I/O Serial audio data input for modulation/General I/O in/output terminal
48 TXO/PIOEN O/I Modulation data output/ General I/O enable input terminal
BU2090F (IC302)
MM74LCX244
WMX
(IC809~811)
1
2
3
4
5
6
7
8
20
19
18
16
15
14
13
I3
VCC
OE2
O2
I5
O0
I4
O1
I6
OE
I0
O4
I1
O5
I2
O6
9 12
O7 O3
10 11
GND
I7
TOP VIEW
17
1
2
3
4
5
6
7
8
18
17
16
15
14
13
12
11 Q3
VDD
OE
Q7
Q8
Q11
Q10
Q9
Q6
VSS
DATA
CLOCK
LCK
Q0
Q1
Q2
9 10 Q4
Q5
CONTROL CIRCUIT
12-bit SHIFT REGISTER
12-bit STRAGE REGISTER
OUTPUT BUFFER (OPEN DRAIN)
64
49
48 33
32
17
16 1
AM
1
AM
2
AM
3
AM
4
AM
5
AM
6
AM
7
AM
8
AM
9
AM 1
0
AM 1
1
AM 1
2
AM 1
3
AM 1
4
AM 1
5
AM 1
6
AM 17
AM 18
AM 19
AM 20
AM 21
AM 22
AM 23
AM 24
AM 25
AM 26
AM 27
AM 28
AM 29
AM 30
AM 31
AM 32
G7 G8 G9 G1
0
G1
1
AA8
/G
1
2
AA7
/G
1
3
AA6
/G
1
4
AA5
/G
1
5
AA4
/G
1
6
AA3 AA2 AA1 AM3
5
AM3
4
AM3
3
DI
CL
CE
RES
V
DD
OSCI
OSCO
Vss
TEST
V
FL
G1
G2
G3
G4
G5
G6
LC75721E (IC301)
V
DD
V
SS
V
FL
DI
CL
CE
DI: Data
CL: Clock
CE: Chip enable
OSCI
OSCO
RES
AM1~AM35
AA1~AA3
AA4/G16
AA5/G15
AA6/G14
AA7/G13
AA8/G12
G1~G11
TEST
Symbol
LC75721E Terminal Function
Power te5V
Power terminal GND
Power terminal FL drive
Serial data transfer terminal
External CR connecting terminal
System reset terminal
Anode output terminal
Anode/Grid output terminal
Grid output terminal
LSI test terminal
Function
V
ID
E
O OU
T
VI
N
1
A
1 2 3 4 5 6 7
6dB
amp
8
Vc
c
9
video switch
(4 inout 1 output)
control
driver
B
GN
D
VI
N
2
VI
N
3
VI
N
4
LA7952 (IC601,621,622)