15
AVR-5805/AVC-A1XV-UPGRADE
94
P27/AN27/D7
VDCLK
O
C
-
-
-
Z
O/L
FPGA rewrite control terminal
95
P26/AN26/D6
VCONF_DONE
I
-
Lv
-
-
Z
O/L
FPGA rewrite control terminal
96
P25/AN25/D5
VCPUASON
O
C
-
-
-
Z
O/L
Rewrite for FPGAROM ON=L
※
Initial setting, V.POWER OFF=H
97
P24/AN24/D4
VnCE
O
C
-
-
-
Z
O/L
FPGA rewrite control terminal
98
P23/AN23/D3
VSEL5
O
C
-
-
-
Z
O/L
BUS SW(FPGA) switching control terminal
99
P22/AN22/D2
VSEL4
O
C
-
-
-
Z
O/L
BUS SW(FPGA) switching control terminal
100
P21/AN21/D1
VSEL3
O
C
-
-
-
Z
O/L
BUS SW(FPGA) switching control terminal
101
P20/AN20/D0
VSEL2
O
C
-
-
-
Z
O/L
BUS SW(FPGA) switching control terminal
102
P17/INT5/D15
VSEL1
O
C
-
-
-
Z
O/L
BUS SW(FPGA) switching control terminal
103
P16/INT4/D14
ACK VIMO
I
-
E
↑
&L
-
-
Z
O/L
MAIN-VIDEO communication Control terminal
104
P15/INT3/D13
HDMIVS.
I
-
E
↓
&L
-
-
Z
O/L
HDMI V SYNC input terminal for count
105
P14/D12
TDO
O
C
-
-
-
Z
O/L
JTAG terminal for rewriting
106
P13/D11
FPGATDI
I
-
Lv
-
-
Z
O/L
JTAG terminal for rewriting
107
P12/D10
TMS
O
C
-
-
-
Z
O/L
JTAG terminal for rewriting
108
P11/D9
TCK
O
C
-
-
-
Z
O/L
JTAG terminal for rewriting
109
P10/D8
HDMI IN1
O
C
-
-
Ed
Z
O/L
HDMI input selection control terminal
110
P07/AN07/D7
HDMI IN2
O
C
-
-
Ed
Z
O/L
HDMI input selection control terminal
111
P06/AN06/D6
HDMI IN3
O
C
-
-
Ed
Z
O/L
HDMI input selection control terminal
112
P05/AN05/D5
HDMI R RST1
O
C
-
-
Ed
Z
O/L
Reset for HDMI RECEIVER(Si I9031)(DVI/HDMI1)
113
P04/AN04/D4
HDMI R RST2
O
C
-
-
Ed
Z
O/L
Reset for HDMI RECEIVER(Si I9031)(HDMI2/3)
114
P114
HDMI R RST3
O
C
-
-
Ed
Z
O/L
Reset for HDMI RECEIVER(Si I9031)(HDMI4/5)
115
P113
SCDT
I
-
Lv
-
-
Z
O/L
HDMI RECEIVER(Si I9031) SCDT output detection
116
P112/
INT
I
-
Lv
-
-
Z
O/L
HDMI RECEIVER(Si I9031) INT output detection
117
P111/
WPCPU1
O
C
-
-
-
Z
O/L
WRITE PROTECT terminalfor HDMI IN EDIT(24LC02)
118
P110/
WPCPU2
O
C
-
-
-
Z
O/L
WRITE PROTECT terminalfor HDMI IN EDIT(24LC02)
119
P03/AN03/D3
PRMVCPU1
O
C
-
-
-
Z
O/L
HDMI IN Terminal, HP DET control terminal
120
P02/AN02/D2
PRMVCPU2
O
C
-
-
-
Z
O/L
HDMI IN Terminal, HP DET control terminal
121
P01/AN01/D1
AUDIO1
O
C
-
-
-
Z
O/L
HDMI AUDIO selection
122
P00/AN00/D0
AUDIO2
O
C
-
-
-
Z
O/L
HDMI AUDIO selection
123
P157/AN157
AUDIO3
O
C
-
-
-
Z
O/L
HDMI AUDIO selection
124
P156/AN156
HDMI T RST1
O
C
-
-
Ed
Z
O/L
Reset for HDMI TRANSMITTER (Si I9030)
125
P155/AN155
HDMI SENS1
I
-
E
↓
&L
-
-
Z
O/L
HDMI IN signal detect input
126
P154/AN154
HDMI T RST2
O
C
-
-
Ed
Z
O/L
Reset for HDMI TRANSMITTER (Si I9030)
127
P153/AN153
HDMI SENS2
I
-
E
↓
&L
-
-
Z
O/L
HDMI IN signal detect input
128
P152/AN152/
CFSEL0
O
C
-
-
-
Z
O/L
Image resolution selection control terminal
129
P151/AN151/
CFSEL1
O
C
-
-
-
Z
O/L
Image resolution selection control terminal
130
VSS
VSS
-
-
-
-
-
-
-
GND
131
P150/AN150/
VIDEO POWER
O
C
-
-
Ed
Z
O/L
VIDEO POWER control terminal(ON:"H")
132
VCC
VCC
-
-
-
-
-
-
-
+3.3V
133
P107/AN7
IP RST
O
C
-
-
Ed
Z
O/L
Reset for IP CONVERTER(FLI2310)
134
P106/AN6
TE RST
O
C
-
-
Ed
Z
O/L
Reset for COMPONENT FORMAT DETECTOR (TE8200PF)
135
P105/AN5
VD RSTZ1
O
C
-
-
Ed
Z
O/L
Reset for VIDEO DECODER(ADV7403)
136
P104/AN4
Z1CERST
O
C
-
-
Ed
Z
O/L
Reset for COMPONENT ENCODER(ADV7320)
137
P103/AN3
Z1SVERST
O
C
-
-
Ed
Z
O/L
Reset for S/CVBS ENCODER(ADV7320)
138
P102/AN2
(G BDOWN)
O
C
-
-
(-)
Z
O/L
NC(VIDEO-GUI communication control terminal)
139
P101/AN1
(RST G)
O
C
-
-
(-)
Z
O/L
NC(VIDEO-GUI communication control terminal)
140
AVSS
AVSS
-
-
-
-
-
-
-
Analog GND
141
P100/AN0
(ACK GIVO)
O
C
-
-
(-)
Z
O/L
NC(VIDEO-GUI communication control terminal)
142
VREF
VREF
-
-
-
-
-
-
-
Standard power input +3.3V
143
AVCC
AVCC
-
-
-
-
-
-
-
Analog power +3.3V
O
C
-
-
(-)
Z
O/L
NC(VIDEO-GUI communication control terminal)
Pin
Pin name
Symbol
I/O
Type
Det
Op(Int.)
Op(Ext.)
Res
stop
Function
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