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LCP-8500A4EDR

Preliminary

 

DELTA ELECTRONICS, INC.

 

13 2008/7/16

Rev. 0A

www.deltaww.com

 

6) 

State/ Control Bits 

Byte 

 Bit 

Name 

Description 

110 

Tx Disable State 

Digital state of the Tx disable input pin 

110 

Soft Tx Disable 

Read/ Write bit that allow software disable of laser 

110 5 

Reserved 

 

110 

Rate Select tate 

NA 

110 

Soft Rate Select 

NA 

110 

Tx Fault 

Digital state of the Tx fault output pin 

110 1 

LOS 

Digital 

state 

of the LOS output pin. 

110 

Data_Ready_Bar 

NA 

7) 

Optional Set of Alarm and Warning 

Byte 

 Bit 

Name 

Description 

112 

Temp High Alarm 

Set when internal temperature exceeds high alarm level 

112 

Temp Low Alarm 

Set when internal temperature is below low alarm level 

112 

Vcc High Alarm 

Set when internal supply voltage exceeds high alarm level 

112 

Vcc Low Alarm 

Set when internal supply voltage is below low alarm level 

112 

Tx Bias High Alarm 

Set when Tx Bias current exceeds high alarm level 

112 

Tx Bias Low Alarm 

Set when Tx Bias current is below low alarm level 

112 

Tx Power High Alarm 

Set when Tx output power exceeds high alarm level 

112 

Tx Power Low Alarm 

Set when Tx output power is below low alarm level 

113 

Rx Power High Alarm 

Set when received power exceeds high alarm level 

113 

Rx Power Low Alarm 

Set when received power is below low alarm level 

113 

5-0 

Reserved 

 

116 

Temp High Warning 

Set when internal temperature exceeds high warning level 

116 

Temp Low Warning 

Set when internal temperature is below low warning level 

116 

Vcc High Warning 

Set when internal supply voltage exceeds high warning level 

116 

Vcc Low Warning 

Set when internal supply voltage is below low warning level 

116 

Tx Bias High Warning 

Set when Tx Bias current exceeds high warning level 

116 

Tx Bias Low Warning 

Set when Tx Bias current is below low warning level 

116 

Tx Power High Warning 

Set when Tx output power exceeds high warning level 

116 

Tx Power Low Warning 

Set when Tx output power is below low warning level 

117 

Rx Power High Warning 

Set when received power exceeds high warning level 

117 

Rx Power Low Warning 

Set when received power is below low warning level 

117 

5-0 

Reserved 

 

Digital Diagnostic Monitor Accuracy

 

Parameter 

Typical Value 

Note 

Transceiver Temperature 

±

 3

 

Power Supply Voltage 

±

 3% 

TX Bias Current 

±

 10% 

 

TX Optical Power 

±

 1.5dB 

 

RX Optical Power 

±

 3dB 

 

Notes: 

1)  Temperature is measured internal to the transceiver. 

2) 

Voltage is measured internal to the transceiver.

 

Summary of Contents for LCP-8500A4EDR

Page 1: ...y for high speed communication applications that require rates of up to 8 5Gb s It is compliant with SFP MSA SFF 8431 specification and Fiber Channel FC PI 4 as well as MSA SFF 8472 The LCP 8500A4EDR transceivers provide with the LC receptacle that is compatible with the industry standard LCTM connector The transceiver is also compatible with industry standard RFT connector and cage The post ampli...

Page 2: ...oltage Vin pp 120 1000 mVppd 1 Data Input Rise Fall Time 15 40 Ps 2 Transmitter Disable Input High VDISH 2 VCC 0 3 V Transmitter Disable Input Low VDISL 0 0 8 V Transmitter Fault Output High VTXFH 2 VCC 0 3 V Transmitter Fault Output Low VTXFL 0 0 8 V Receiver Differential Output Voltage Vout pp 300 1000 mVppd 3 Data Output Rise Fall Time 45 Ps 1 LOS Output Voltage Low VLOSH 2 VCC 0 3 V LOS Output...

Page 3: ...2 dB Link Length Data Rate Standard Fiber Type Modal Bandwidth 850nm MHz km Distance Range m Notes 62 5 125 µm MMF 200 0 5 to 21 5 50 125 µm MMF 500 0 5 to 50 5 50 125 µm MMF 900 0 5 to 90 5 50 125 µm MMF 1500 0 5 to 120 5 8 5Gbps 50 125 µm MMF 2000 0 5 to 150 5 Notes 1 Equivalent extinction ratio specification for Fiber Channel Allows smaller ER at higher average power 2 Measured at nominal data ...

Page 4: ...LCP 8500A4EDR Preliminary DELTA ELECTRONICS INC 4 2008 7 16 Rev 0A www deltaww com SFP Transceiver Electrical Pad Layout Module Electrical Pin Definition ...

Page 5: ...round 1 12 CML O RD Receiver Inverted Data Output 13 CML O RD Receiver Non Inverter Data Output 14 VeeR Module Receiver Ground 1 15 VccR Module Receiver 3 3V Supply 16 VccT Module Transmitter 3 3V Supply 17 VeeT Module Transmitter Ground 1 18 CML I TD Transmitter Non Inverted Data Input 19 CML I TD Transmitter Inverted Data Input 20 VeeT Module Transmitter Ground 1 Notes 1 The module signal ground...

Page 6: ...ata path rate coverage for an SFP module RS1 is an input hardware pin which optionally selects the optical transmits path data rate coverage for an SFP module RS1 is commonly connected to VeeT or VeeR in the legacy SFP modules The host needs to ensure that it will not be damaged if this pin is connected to VeeT or VeeR in the module 4 MOD_ABS Mod_ABS is pulled up to Host_Vcc with 4 7k 10k ohms on ...

Page 7: ...P Module 0 1uF 0 1uF 10uF 1uH 1uH 0 1uF 10uF 3 3V 100 Ohms RES1 RES1 VCC SerDes IC RES1 RES1 RES1 3 3V PLD PAL Protocol Vcc Tx_Disable Tx_Fault Rx_LOS Receiver Rate Select Transmitter Rate Select Protocol IC VccT Tx_Disable Tx_Fault TD TD VeeT VccR RD RD Rx_LOS VeeR RS0 RS1 SCL SDA MOD ABS RES1 4 7k TO 10k Ohms Depands on SerDes IC used 30k Ohms 30k Ohms Micro Control Recommend Circuit Schematic ...

Page 8: ...LCP 8500A4EDR Preliminary DELTA ELECTRONICS INC 8 2008 7 16 Rev 0A www deltaww com Package Outline Drawing for Metal Housing with Bail de latch Complies with 21 CFR 1040 10 and 1040 11 Made in x FS FS ...

Page 9: ...on 100 µsec 10 RX_LOS negate delay t_los_off 100 µsec 11 Notes 1 Rising edge of TX_Disable to fall of output signal below 10 of nominal 2 Falling edge of TX_Disable to rise of output signal above 90 of nominal This only applies in normal operation not during start up or fault recovery 3 From power on or negation of TX_Disable 4 From power on or TX_Disable negated during power up or TX_Fault recove...

Page 10: ...10000 X A0h 2 wire address 1010001 X A2h 0 0 55 Alarm and Warning Thresholds 56 bytes 95 Serial ID Defined by SFP MSA 96 bytes 56 95 Cal Constants 40 bytes 96 96 119 Real Time Diagnostic Interface 24 bytes 127 Vender Specific 32 bytes 120 127 Vender Specific Note 128 128 247 User Writable EEPROM 120 bytes 255 Reserved in SFP MSA 128 bytes 248 255 Vender Specific 8 bytes Digital Diagnostic Memory M...

Page 11: ...59 20 102 00 17 02 60 03 103 00 18 00 61 52 104 00 19 00 62 00 105 00 20 44 D 63 CS1 Note 1 106 00 21 45 E 64 00 107 00 22 4C L 65 3A 108 00 23 54 T 66 00 109 00 24 41 A 67 00 110 00 25 20 68 SN Note 2 111 00 26 20 69 SN 112 00 27 20 70 SN 113 00 28 20 71 SN 114 00 29 20 72 SN 115 00 30 20 73 SN 116 00 31 20 74 SN 117 00 32 20 75 SN 118 00 33 20 76 SN 119 00 34 20 77 SN 120 00 35 20 78 SN 121 00 3...

Page 12: ...r High Warning P 2 30 31 2 TX Power Low Warning P 2 dBm 3 32 33 2 RX Power High Alarm P0 3 34 35 2 RX Power Low Alarm PS 2 36 37 2 RX Power High Warning P0 2 38 39 2 RX Power Low Warning PS dBm 4 40 45 16 Reversed 56 91 36 External Calibration Constants 92 94 3 Reversed 95 1 Checksum 5 96 97 2 Real Time Temperature 98 99 2 Real Time Supply Voltage 100 101 2 Real Time Tx Bias Current 102 103 2 Real...

Page 13: ... power is below low alarm level 113 7 Rx Power High Alarm Set when received power exceeds high alarm level 113 6 Rx Power Low Alarm Set when received power is below low alarm level 113 5 0 Reserved 116 7 Temp High Warning Set when internal temperature exceeds high warning level 116 6 Temp Low Warning Set when internal temperature is below low warning level 116 5 Vcc High Warning Set when internal ...

Page 14: ...2 Class B CISPR 22 5 2 Immunity Radio Frequency Electromagnetic Field EN 61000 4 3 IEC 1000 4 3 5 3 Immunity Electrostatic Discharge to the Duplex SC Receptacle EN 61000 4 2 IEC 1000 4 2 IEC 801 2 5 4 Electrostatic Discharge to the Electrical Pins MIL STD 883C Method 3015 4 EIAJ 1988 3 2B Version 2 Machine model 5 1 Satisfied with electrical characteristics of product spec 2 No physical damage ...

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