118
DSP Block Diagram
or
B
LU LI
N
K
IN
VE
N
U3
6
0-B
D
ANTE
P
RI/SE
C
VE
N
U3
6
0-D
or
B
LU LI
N
K
OUT
VE
N
U3
6
0-B
D
ANTE
P
RI/SE
C
VE
N
U3
6
0-D
IN1
IN2
IN3
IN4
IN5
IN6
IN7
IN7
IN6
IN5
IN4
IN3
IN2
IN1
RT
A M
IC I
N
PUT
**S
IG
NAL G
E
N
E
RA
TOR
SI
GN
A
L GENER
A
TO
R
***RT
A S
OU
R
CE
B
U
S A
MID
1
MID
2
MID
3
MID
4
MID
5
MID
6
B
U
S 1
B
U
S 2
B
U
S 3
B
U
S B
B
U
S C
1
2
3
A
B
C
CH1
CH2
CH3
CH4
CH5
CH6
RT
A
M
IC I
N
PUT
F
ront-P
anel
OUTPUT Meters
F
ront-P
anel
OUTPUT Mutes
F
ront-P
anel
M
IX/
R
OUTE
Mutes & Meters
Configur
able I
nser
ts:
AG
C
Compressor
Noise Gate
Subharmonic Synth
Fill Delay
Configur
able I
nser
ts:
AG
C
B
ac
kline Delay
31-B
and Graphic E
Q
Compressor
Noise Gate
12-B
and Parametric E
Q
Subharmonic Synth
*ANAL
OG1
*AE
S1
*AE
S2
*ANAL
OG3
ANAL
OG 3
*Default Input c
hannel assignments� Input c
hannel assignments can be edited in VE
N
U3
6
0-B and VE
N
U3
6
0-D models to include B
LU link or Dante c
hannels�
**Signal Generator can be routed to any single input (I
N1-I
N7) or all inputs simult
aneously (I
N1-I
N7)� Input c
hannels are “unrouted” when Signal Generator is routed to a c
hannel�
***RT
A source selections includes: RT
A Mic Input, Signal Generator
, I
N1-I
N7
, or Buses (including bus summing options listed below)�
The following routing/mixing options are available for eac
h output procesing c
hain: I
N1, I
N2, I
N3, I
N4, I
N5, I
N6, I
N7
, mix all inputs (I
N1-I
N7), Bus 1, Bus 2, Bus 3, Bus 1+2 sum, Bus 2+3 sum,
Bus 1+2+3 sum, mix Buses 1/2/3, Bus A, Bus B, Bus C, Bus A+B sum, Bus B+C sum, Bus A+B+C sum, mix Buses A/
B
/C�
Output Input
ANAL
OG 1
AE
S CH 1 & 2
IN
PUTS
OUTPUTS
*ANAL
OG2
*AE
S3
*AE
S4
ANAL
OG 2
AE
S CH 3 & 4
Inputs (IN1-IN7)
AutoEQs
Advanced Feedback Suppression
Input Inserts 2
Input Inserts 1
Input Routers/Mixers
Real Time
Analyzer
(RTA)
Signal
Generator
Mid Routers/Mixers
Mid Inserts
Crossovers
8-Band Parametric EQs
Limiters
Driver Alignment Delays
