Dave Embedded Systems Axel ULite, Hardware Manual

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AXEL ULite Hardware Manual v.1.0.2
6.1.5 ECSPI1
AXEL ULite on-board bootable SPI Flash is interfaced with the i.MX6UL
through the eCSPI1 port on chip select 0. For further details, please refer
to Section 3.3.
The following table describes the interface signals:
Pin Name Pin Internal Connections Ball/pin #
ECSPI1_SCLK J2.133 CPU.CSI_DATA04 D4
ECSPI1_CS0 J2.135 CPU.CSI_DATA05 D3
ECSPI1_MOSI J2.137 CPU.CSI_DATA06 D2
ECSPI1_MISO J2.139 CPU.CSI_DATA07 D1
Tab. 19 : ECSPI1 interface signals
6.1.6 NAND
AXEL ULite on-board bootable NAND Flash is interfaced with the
i.MX6UL through the NAND controller port on chip select 0. For further
details, please refer to Section 3.4.
The following table describes the interface signals:
Pin Name Pin Internal Connections Ball/pin #
NAND_READY# J2.84 CPU.NAND_READY A3
NAND_CLE J2.86 CPU.NAND_CLE A4
NAND_ALE J2.88 CPU.NAND_ALE B4
NAND_RE# J2.90 CPU.NAND_RE# D8
NAND_WE# J2.92 CPU.NAND_WE# C8
NAND_WP J2.94 CPU.NAND_WP D5
NAND_CS0# J2.96 CPU.NAND_CE0 C5
NAND_CS1# J2.98 CPU.NAND_CE1 B5
NAND_DQS J2.102 CPU.AND_DQS E6
NAND_DATA00 J2.104 CPU.NAND_DATA00 D7
NAND_DATA01 J2.106 CPU.NAND_DATA01 B7
NAND_DATA02 J2.108 CPU.NAND_DATA02 A7
NAND_DATA03 J2.110 CPU.NAND_DATA03 D6
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