AXEL ULite Hardware Manual
v.1.0.2
6.1.2
USB
AXEL ULite
provides two USB 2.0 On-The-Go (OTG) ports with
integrated PHY. Please note that the OTG_ID (USB mode host or device
identifier) and the other power related signal as OTG_PWR (power) and
OTG_OC (overcurrent) are multiplexed as alternate functions on different
balls/connector pins.
6.1.2.1
USB OTG 1
The following table describes the interface signals:
Pin Name
Pin
Internal Connections
Ball/pin #
USB_OTG1_VBUS
J2.188
CPU.USB_OTG1_VBUS
T12
USB_OTG1_CHD#
J2.194
CPU.USB_OTG1_CHD
U16
USB_OTG1_DP
J2.200
CPU.USB_OTG1_DP
U15
USB_OTG1_DN
J2.202
CPU.USB_OTG1_DN
T15
Tab. 16
: USB1 interface signals
6.1.2.2
USB OTG 2
The following table describes the interface signals:
Pin Name
Pin
Internal Connections
Ball/pin #
USB_OTG2_VBUS
J2.186
CPU.USB_OTG2_VBUS
U12
USB_OTG2_DN
J2.196
CPU.USB_OTG2_DN
T13
USB_OTG2_DP
J2.198
CPU.USB_OTG2_DP
U13
Tab. 17
: USB2 interface signals
August, 2019
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Summary of Contents for Axel ULite
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