X64 Xcelera-HS PX8 User's Manual
Overview
•
9
About the X64 Xcelera-HS PX8 Frame Grabber
Series Key Features
•
Supports area scan or linescan cameras using HS Link
•
Uses a PCIe x8 slot to maximize transfers to host computer buffers
•
Monochrome 8-bit, 10-bit, 12-bit pixel support
•
LUT available in multi-formats
•
2
nd
CX4 connector (HS Link) to redirect image data to another Xcelera HS-PX8 frame
grabber
•
Input Trigger and Shaft Encoder inputs (either opto-coupled or TTL/RS-422)
•
Shaft Encoder features include Direction, Line Trigger, Auto Delay, Line Trigger Too Fast,
and Shaft Encoder Reverse Count Overflow
•
Time Integration
•
Horizontal and Vertical Flip supported on board
•
Support for real time Flat Field / Flat Line Correction
•
Output Strobe
•
Supports a number of acquisition events in compliance with "Trigger to Image Reliability"
•
RoHS compliant
See
” on page 61
for detailed information.
User Programmable Configurations
Use the X64 Xcelera-HS PX8 firmware loader function in the Teledyne DALSA Device manager
utility to select firmware for one of the supported modes. Firmware selection is made either during
driver installation or manually later on (see
" on page 13
).
For the X64 Xcelera-HS PX8 board the firmware choices are:
•
1 x High Speed Camera (installation default selection)
Support for one Camera HS-Link port with 8 bit Flat Field Correction.
•
1 x High Speed Camera with 12 bit FFC/FLC
Support for one Camera HS-Link port with 12 bit Flat Field Correction.
ACUPlus: Acquisition Control Unit
ACUPlus consists of a grab controller, pixel packer, and time base generator. ACUPlus provides a
flexible acquisition front end for a wide variety of imaging solutions.
ACUPlus acquires variable frame sizes up to 256KB per horizontal line and up to 16 million lines per
frame. ACUPlus can also capture an infinite number of lines from a linescan camera without losing
a single line of data.
DTE: Intelligent Data Transfer Engine
The X64 Xcelera-HS PX8 intelligent Data Transfer Engine ensures fast image data transfers
between the board and the host computer with zero CPU usage. The DTE provides a high degree of
data integrity during continuous image acquisition in a non-real time operating system like
Windows. DTE consists of multiple independent DMA units, Tap Descriptor Tables, and Auto-loading
Scatter-Gather tables.