17
CIRCUIT INFORMATION-MPEG
(1) Structure
STi5518 is a 1 chip including 32bit RISC CPU, A/V Demux, Video Encoder, Multi PIO and Cache RAM for the use o
DVB and DSS Set Top.
Followings are summary of distinctive features of each Block.
Enhanced capability with 32bit VL-RISC CPU Core of 81MHZ clock.
Supporting Bandwidth of 200MB/S using internal 2KB SRAM buffer and 2KB DCACHE.
Video Decoder is attached inside supported by MPEG-2 MP@ML and Letter Box.
MPEG Layer1 and 2 Audio Decoder are stored inside.
Providing interface external AC3 Decoder.
Supporting 2 - 8bit/pixel OSD.
Internally stored Video Encoder for the output of RGB, CVBS and Y/C Video
Enhanced CPU and Decoder capability boosted by 64Mbit SDRAM.
Backing External Surrounding Interface Memories. ( 4 Banks )
Able to use Hardware DMUX, input Serial and to support 32Pid.
Boosting 8 Level INT.
Supporting DMA and other multi PID.
2
MPEG
DMAs
Serial
IEEE
1394
Hardware
transport
strearn
demux
2
Kbytes
Instruction
cache
2K
Data
cache
and
2K
SRAM
OS-Link
2
UART
1
I
2
C
PIO
3
PWM
Diagnostic
controller
and
systems
services
SDAV
interface
Block
move
DMA
ST20
CPU
Interrupt
controller
EMI
2
SmartCard
interfaces
(ASC)
MPEG
audio
decoder
AC-3
I/F
MPEG
video
decoder
PAL/NTSC
Encoder
Teletest
interface
Feature 5. Sti5518 Block Diagram
3. Peripheral device of STi5518
Block move
DMA
2 MPEG
DMAs
Serial IEEE 1394
SDAV
interface
Hardward
transport
strearn demux
2 Kbytes
Instruction
cache
2K Data
cache and
2K SRAM
OS-Link
2 UART
PIO
3 PWM
Diagnostic
controller and
systems services
ST20
CPU
Interrupt
controller
EMI
2 SmartCard
interfaces(ASC)
MPEG audio
decoder AC-3 I/F
MPEG
Video
decoder
PAL/NTSC
Encoder
Teletest
interface
Sit5518 Block Diagram
Summary of Contents for DSI-9100
Page 5: ...4 SCHEMATIC DIAGRAM ...
Page 6: ...5 SCHEMATIC DIAGRAM ...
Page 7: ...6 SCHEMATIC DIAGRAM ...
Page 8: ...7 SCHEMATIC DIAGRAM ...
Page 9: ...8 SCHEMATIC DIAGRAM MPEG STI5518 ...
Page 10: ...9 SCHEMATIC DIAGRAM MPEG CIMAX ...
Page 11: ...10 SCHEMATIC DIAGRAM MPEG MEMORY 27M ...
Page 12: ...11 SCHEMATIC DIAGRAM MPEG VIDEO ...
Page 13: ...12 SCHEMATIC DIAGRAM MPEG AUDIO ...
Page 14: ...13 SCHEMATIC DIAGRAM MPEG POWER RS 232 VCR CON ...
Page 15: ...1 Block Diagram 14 CIRCUIT INFORMATION MPEG ...
Page 24: ...23 CIRCUIT INFORMATION MPEG EMI Interface Timing ...
Page 59: ...58 PCB CIRCUIT BOARD 1 MAIN PCB Circuit Board ...
Page 60: ...59 PCB CIRCUIT BOARD 2 MPEG PCB Circuit Board ...
Page 61: ...60 INSTRUMENT DISASSEMBLY 1 PACKING ASS Y ...
Page 62: ...61 INSTRUMENT DISASSEMBLY 2 FRONT PANEL ASSEMBLY 1 7H32D ...
Page 63: ...62 INSTRUMENT DISASSEMBLY 2 4J32D ...
Page 64: ...63 INSTRUMENT DISASSEMBLY 3 SET TOTAL DISASSEMBLY ...
Page 76: ...686 AHYEON DONG MAPO GU SEOUL KOREA C P O BOX 8003 SEOUL KOREA DAEWOO ELECTRONICS Corp ...