Document Number: 002-10635 Rev. *I
Page
183 of 325
S6J3310/20/30/40 Series
9.1.4
AC Characteristics
9.1.4.1
Source Clock Timing
(T
A
: Recommended operating conditions, Vcc5 = 5.0 V ±10 %, V
SS
= DV
SS
= AV
SS
= 0.0 V)
Parameter
Symbol
Pin
Name
Conditions
Value
Unit
Remarks
Min
Typ
Max
Source oscillation
clock frequency
F
C
X0, X1
-
3.6
-
16.0
MHz
Source oscillation
clock cycle time
t
CYL
X0, X1
-
62.5
-
277.8
ns
CAN PLL jitter
(when locked)
t
PJ
-
-
-10
-
10
ns
Internal Slow CR
oscillation frequency
F
CRS
-
-
50
100
150
kHz
Internal Fast CR
oscillation frequency
F
CRF
-
-
2.40
4.00
5.61-
MHz
Before
trim
3.20
4.00
4.81
MHz
After trim
Notes:
−
The maximum/minimum values have been standardized with the main clock and PLL clock in use.
−
Jitter of source oscillator must be smaller than 300 ppm.
−
Enough evaluation and adjustment are recommended using oscillator on your system board.
−
X0 and X1 clock timing
X0
t
CYL
CAN PLL jitter
A time difference from the ideal clock is guaranteed for each cycle period within 20,000 cycles.
Ideal clock
Slow
Fast
PLL output
