Cypress S6J3200 Series, Manual

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CHAPTER 15:12-/10-/8-bit Analog to Digital Converter
S6J3200 Series Hardware Manual Document Number: 002-04852 Rev. *G 323
5.12.
Range Comparator Interrupt Enable Registers
(ADC12Bn_RCIRQE0 to 1)
These registers contain enable bits for all 64 logical channels, dedicated to the generation of range
comparator interrupt.
REGISTER_NAME ADC12Bn_RCIRQEi (i = 0 to 1)
OFFSET i*4
ACCESS_SIZE B H W
MULTIPLE 0:1
NUMERIC_TYPE
-
OTHER
-
5.12.1.
Range Comparator Interrupt Enable Register
(ADC12Bn_RCIRQE0)
BIT_OFFSET 31 30 29 28 27 26 25 24
BIT_NAME RCIRQE31 RCIRQE30 RCIRQE29 RCIRQE28 RCIRQE27 RCIRQE26 RCIRQE25 RCIRQE24
ACCESS_TYPE R/W R/W R/W R/W R/W R/W R/W R/W
PROT_TYPE
INITIAL_VALUE 0 0 0 0 0 0 0 0
BIT_OFFSET 23 22 21 20 19 18 17 16
BIT_NAME RCIRQE23 RCIRQE22 RCIRQE21 RCIRQE20 RCIRQE19 RCIRQE18 RCIRQE17 RCIRQE16
ACCESS_TYPE R/W R/W R/W R/W R/W R/W R/W R/W
PROT_TYPE
INITIAL_VALUE 0 0 0 0 0 0 0 0
BIT_OFFSET 15 14 13 12 11 10 9 8
BIT_NAME RCIRQE15 RCIRQE14 RCIRQE13 RCIRQE12 RCIRQE11 RCIRQE10 RCIRQE9 RCIRQE8
ACCESS_TYPE R/W R/W R/W R/W R/W R/W R/W R/W
PROT_TYPE
INITIAL_VALUE 0 0 0 0 0 0 0 0
BIT_OFFSET 7 6 5 4 3 2 1 0
BIT_NAME RCIRQE7 RCIRQE6 RCIRQE5 RCIRQE4 RCIRQE3 RCIRQE2 RCIRQE1 RCIRQE0
ACCESS_TYPE R/W R/W R/W R/W R/W R/W R/W R/W
PROT_TYPE
INITIAL_VALUE 0 0 0 0 0 0 0 0
[bit31:0] RCIRQE31 to 0 : Range Comparator Interrupt Enable bits
Bit Description
0 Range comparator interrupt disabled.
1 Range comparator interrupt enabled
Range comparator interrupt is issued when this bit is "1" and the corresponding interrupt flags
ADC12Bn_RCIRQ0.RCIRQ31 to 0 and ADC12Bn_CHSTAT0 to 31.RCIRQ are set to "1".