Cypress PSoC CY8CTMG20 Series, Technical Reference Manual

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PSoC CY8CTMG20x and CY8CTST200 TRM, Document No. 001-53603 Rev. *C 35
Supervisory ROM (SROM)
The IRAMDIS bit allows the preservation of variables even if
a watchdog reset (WDR) occurs. The IRAMDIS bit is reset
by all system resets except watchdog reset. Therefore, this
bit is only useful for watchdog resets and not general resets.
Address F8h is the return code byte for all SROM functions
(except Checksum and TableRead); for this function, the
only acceptable values are 00h, 02h, and 06h. Address FCh
is the fail count variable. After POR (Power on Reset),
WDR, or XRES (External Reset), the variable is initialized to
00h by the SROM. Each time the Checksum fails, the fail
count is incremented. Therefore, if it takes two passes
through SWBootReset to get a good Checksum, the fail
count is 01h.
3.1.2.2 ReadBlock Function
The ReadBlock function is used to read 128 contiguous
bytes from Flash: a block. The device has 32 KB of Flash
and has two hundred fifty-six 128-byte blocks. Valid block
IDs are 0x00 to 0xFF.
The first thing the ReadBlock function does is check the pro-
tection bits to determine if the wanted BLOCKID is readable.
If read protection is turned on, the ReadBlock function exits
setting the accumulator and KEY2 back to 00h. KEY1 has a
value of 01h indicating a read failure.
If read protection is not enabled, the function reads 128
bytes from the Flash using a
ROMX
instruction and stores the
results in SRAM using an
MVI
instruction. The 128 bytes are
stored in SRAM, beginning at the address indicated by the
value of the POINTER parameter. When the ReadBlock
completes successfully, the accumulator, KEY1, and KEY2
has a value of 00h.
Note An
MVI [expr], A
stores the Flash block contents
in SRAM meaning that you can use the MVW_PP register to
indicate which SRAM pages receive the data.
3.1.2.3 WriteBlock Function
The WriteBlock function stores data in the Flash. No verifi-
cation of the data is performed, but execution time is about
1 ms less than the WriteAndVerify function. The WriteAnd-
Verify function is the recommended method for altering the
data in one Block of Flash (
see “WriteAndVerify Function” on
page 37 ). Data moves 128 bytes at a time from SRAM to
Flash. This is a two-step process, the first step is to load the
page latch with 128 bytes of data and it is followed by the
programming of the corresponding block of Flash. No erase
is needed before WriteBlock.
If write protection is turned on, then the WriteBlock function
exits, setting the accumulator and KEY2 back to 00h. KEY1
has a value of 01h, indicating a write failure. Write protection
is set when the PSoC device is programmed externally and
cannot be changed through the
SSC
function.
The BLOCKID of the Flash block, where the data is stored,
must be determined and stored at SRAM address FAh. Valid
block IDs are 0x00 to 0xFF.
Table 3-5. SRAM Map Post SWBootReset (00h)
Address
0 1 2 3 4 5 6 7
8 9 A B C D E F
0x0_
0x00 0x00 0x00 ?? ?? ?? ?? ??
?? ?? ?? ?? ?? ?? ?? ??
0x1_
?? ?? ?? ?? ?? ?? ?? ??
?? ?? ?? ?? ?? ?? ?? ??
0x2_
?? ?? ?? ?? ?? ?? ?? ??
?? ?? ?? ?? ?? ?? ?? ??
0x3_
?? ?? ?? ?? ?? ?? ?? ??
?? ?? ?? ?? ?? ?? ?? ??
0x4_
?? ?? ?? ?? ?? ?? ?? ??
?? ?? ?? ?? ?? ?? ?? ??
0x5_
?? ?? ?? ?? ?? ?? ?? ??
?? ?? ?? ?? ?? ?? ?? ??
0x6_
?? ?? ?? ?? ?? ?? ?? ??
?? ?? ?? ?? ?? ?? ?? ??
0x7_
?? ?? ?? ?? ?? ?? ?? ??
?? ?? ?? ?? ?? ?? ?? ??
0x8_
?? ?? ?? ?? ?? ?? ?? ??
?? ?? ?? ?? ?? ?? ?? ??
0x9_
?? ?? ?? ?? ?? ?? ?? ??
?? ?? ?? ?? ?? ?? ?? ??
0xA_
?? ?? ?? ?? ?? ?? ?? ??
?? ?? ?? ?? ?? ?? ?? ??
0xB_
?? ?? ?? ?? ?? ?? ?? ??
?? ?? ?? ?? ?? ?? ?? ??
0xC_
?? ?? ?? ?? ?? ?? ?? ??
?? ?? ?? ?? ?? ?? ?? ??
0xD_
0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0xE_
0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
0xF_
0x00 0x00 0x00 0x00 0x00 0x00 ?? ??
0x00
0x02
0x06
Xx 0x00 0x00 0xn xx 0x00 0x00
Table 3-6. Flash Memory Organization
PSoC Device
Amount of
Flash
Amount of
SRAM
Number of
Blocks
per Bank
Number of
Banks
CY8CTMG200,
CY8CTST200
32 KB 2K Bytes 256 1
Table 3-7. ReadBlock Parameters (01h)
Name Address Type Description
MVW_PP 0,D5h Register MVI write page pointer register.
KEY1 0,F8h RAM 3Ah.
KEY2 0,F9h RAM
Stack Pointer value+3, when
SSC
is
executed.
BLOCKID 0,FAh RAM Flash block number.
POINTER 0,FBh RAM
Addresses in SRAM to store returned
data.
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