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152
Document # 001-20559 Rev. *D
1,E1h
13.3.27
OSC_CR1
Oscillator Control Register 1
This register selects the divider value for variable clocks 1 and 2 (VC1 and VC2).
For additional information, refer to the
“Register Definitions” on page 279
in the Digital Clocks chapter.
7:4
VC1 Divider[3:0]
Internal Main Oscillator
External Clock
0h
24 MHz
EXTCLK / 1
1h
12 MHz
EXTCLK / 2
2h
8 MHz
EXTCLK / 3
3h
6 MHz
EXTCLK / 4
4h
4.8 MHz
EXTCLK / 5
5h
4 MHz
EXTCLK / 6
6h
3.43 MHz
EXTCLK / 7
7h
3 MHz
EXTCLK / 8
8h
2.67 MHz
EXTCLK / 9
9h
2.40 MHz
EXTCLK / 10
Ah
2.18 MHz
EXTCLK / 11
Bh
2.00 MHz
EXTCLK / 12
Ch
1.85 MHz
EXTCLK / 13
Dh
1.71 MHz
EXTCLK / 14
Eh
1.6 MHz
EXTCLK / 15
Fh
1.5 MHz
EXTCLK / 16
3:0
VC2 Divider[3:0]
Internal Main Oscillator
External Clock
0h
(24 / (OSC_CR1[7:4]+1)) / 1
(EXTCLK / (OSC_CR1[7:4]+1)) / 1
1h
(24 / (OSC_CR1[7:4]+1)) / 2
(EXTCLK / (OSC_CR1[7:4]+1)) / 2
2h
(24 / (OSC_CR1[7:4]+1)) / 3
(EXTCLK / (OSC_CR1[7:4]+1)) / 3
3h
(24 / (OSC_CR1[7:4]+1)) / 4
(EXTCLK / (OSC_CR1[7:4]+1)) / 4
4h
(24 / (OSC_CR1[7:4]+1)) / 5
(EXTCLK / (OSC_CR1[7:4]+1)) / 5
5h
(24 / (OSC_CR1[7:4]+1)) / 6
(EXTCLK / (OSC_CR1[7:4]+1)) / 6
6h
(24 / (OSC_CR1[7:4]+1)) / 7
(EXTCLK / (OSC_CR1[7:4]+1)) / 7
7h
(24 / (OSC_CR1[7:4]+1)) / 8
(EXTCLK / (OSC_CR1[7:4]+1)) / 8
8h
(24 / (OSC_CR1[7:4]+1)) / 9
(EXTCLK / (OSC_CR1[7:4]+1)) / 9
9h
(24 / (OSC_CR1[7:4]+1)) / 10
(EXTCLK / (OSC_CR1[7:4]+1)) / 10
Ah
(24 / (OSC_CR1[7:4]+1)) / 11
(EXTCLK / (OSC_CR1[7:4]+1)) / 11
Bh
(24 / (OSC_CR1[7:4]+1)) / 12
(EXTCLK / (OSC_CR1[7:4]+1)) / 12
Ch
(24 / (OSC_CR1[7:4]+1)) / 13
(EXTCLK / (OSC_CR1[7:4]+1)) / 13
Dh
(24 / (OSC_CR1[7:4]+1)) / 14
(EXTCLK / (OSC_CR1[7:4]+1)) / 14
Eh
(24 / (OSC_CR1[7:4]+1)) / 15
(EXTCLK / (OSC_CR1[7:4]+1)) / 15
Fh
(24 / (OSC_CR1[7:4]+1)) / 16
(EXTCLK / (OSC_CR1[7:4]+1)) / 16
Individual Register Names and Addresses:
1,E1h
OSC_CR1: 1,E1h
7
6
5
4
3
2
1
0
Access : POR
RW : 0
RW : 0
Bit Name
VC1 Divider[3:0]
VC2 Divider[3:0]
Bit
Name
Description
Summary of Contents for PSoC CY8C23533
Page 4: ...Contents Overview 4 Document 001 20559 Rev D Section G Glossary 385 Index 401 ...
Page 16: ...Contents Overview 16 Document 001 20559 Rev D ...
Page 24: ...24 Document 001 20559 Rev D Section A Overview ...
Page 30: ...30 Document 001 20559 Rev D Pin Information ...
Page 54: ...54 Document 001 20559 Rev D Supervisory ROM SROM ...
Page 60: ...60 Document 001 20559 Rev D RAM Paging ...
Page 68: ...68 Document 001 20559 Rev D Interrupt Controller ...
Page 76: ...12 Document 001 20559 Rev D General Purpose IO GPIO ...
Page 82: ...18 Document 001 20559 Rev D Internal Main Oscillator IMO ...
Page 84: ...20 Document 001 20559 Rev D Internal Low Speed Oscillator ILO ...
Page 90: ...26 Document 001 20559 Rev D External Crystal Oscillator ECO ...
Page 94: ...30 Document 001 20559 Rev D Phase Locked Loop PLL ...
Page 106: ...42 Document 001 20559 Rev D Sleep and Watchdog ...
Page 228: ...164 Document 001 20559 Rev D Section D Digital System ...
Page 234: ...170 Document 001 20559 Rev D Array Digital Interconnect ADI ...
Page 278: ...214 Document 001 20559 Rev D Digital Blocks ...
Page 296: ...232 Document 001 20559 Rev D Analog Interface ...
Page 304: ...240 Document 001 20559 Rev D Analog Array ...
Page 308: ...244 Document 001 20559 Rev D Analog Input Configuration ...
Page 312: ...248 Document 001 20559 Rev D Analog Reference ...
Page 338: ...274 Document 001 20559 Rev D Section F System Resources ...
Page 354: ...290 Document 001 20559 Rev D Multiply Accumulate MAC ...
Page 374: ...310 Document 001 20559 Rev D I2C ...
Page 400: ...336 Document 001 20559 Rev D Section G Glossary ...