enCoRe™ V CY7C643xx, enCoRe™ V LV CY7C604xx TRM, Document No. 001-32519 Rev *H
35
Supervisory ROM (SROM)
An
MVI A, [expr]
instruction is used to move data from
SRAM into flash. Therefore, use the
MVI
read pointer
(MVR_PP register) to specify which SRAM page from which
data is pulled. Using the
MVI
read pointer and the parameter
blocks POINTER value allows the SROM WriteBlock func-
tion to move data from any SRAM page into any flash block.
The SRAM address, the first of the 128 bytes to store in
flash, is indicated using the POINTER variable in the param-
eter block (SRAM address FBh).
3.1.2.4
EraseBlock Function
The EraseBlock function is not recommended for use. The
functionality is redundant with the WriteBlock and WriteAnd-
Verify functions. The only practical use is for clearing all data
in a 128 byte block of contiguous bytes in flash to 00h. If
used, it should not be called repeatedly on the same block.
It may be used between WriteAndVerify or WriteBlock oper-
ations.
If write protection is turned on, then the EraseBlock function
exits, setting the accumulator and KEY2 back to 00h. KEY1
has a value of 01h, indicating a write failure.
To set up the parameter block for the EraseBlock function,
store the correct key values in KEY1 and KEY2. The block
number to erase must be stored in the BLOCKID variable.
3.1.2.5
ProtectBlock Function
The enCoRe V devices offer flash protection on a block-by-
block basis.
lists the protection modes available.
In the table, ER and EW indicate the ability to perform exter-
nal reads and writes (that is, by an external programmer).
For internal writes, IW is used. Internal reading is always
permitted by way of the
ROMX
instruction. An SR indicates
the ability to read by way of the SROM ReadBlock function.
In this table, note that all protection is removed by EraseAll.
3.1.2.6
TableRead Function
The TableRead function gives the user access to part-spe-
cific data stored in the flash during manufacturing. The flash
for these tables is separate from the program flash and is
not directly accessible. It also returns a revision ID for the
die (do not confuse this with the silicon ID stored in the Table
0 row in
A summary of the information stored in the tables for the
flash is contained in
.CY8C20X66A/AS/
LCY8C20X46A/46AS/96A/46L/96L
3.1.2.7
EraseAll Function
The EraseAll function performs a series of steps that
destroys the user data in the flash banks and resets the pro-
tection block in each flash bank to all zeros (the unprotected
state). This function is only executed by an external pro-
grammer. If EraseAll is executed from code, the M8C HALTs
without touching the flash or protections. See
The three other hidden blocks above the protection block, in
each flash bank, are not affected by the EraseAll.
Table 3-8. WriteBlock Parameters (02h)
Name
Address
Type
Description
MVR_PP
0,D4h
Register
MVI
read page pointer register.
KEY1
0,F8h
RAM
3Ah.
KEY2
0,F9h
RAM
Stack Pointer value+3, when
SSC
is
executed.
BLOCKID
0,FAh
RAM
Flash block number.
POINTER
0,FBh
RAM
First of 128 addresses in SRAM, where
the data to be stored in flash, is located
before calling WriteBlock.
Table 3-9. EraseBlock Parameters (03h)
Name
Address
Type
Description
KEY1
0,F8h
RAM
3Ah.
KEY2
0,F9h
RAM
Stack Pointer value+3, when SSC is
executed.
BLOCKID
0,FAh
RAM
Flash block number.
Table 3-10. Protect Block Modes
Mode
Settings
Description
In PSoC Designer
00b
SR ER EW IW
Unprotected
U = Unprotected
01b
SR ER EW IW
Read protect
F = Factory upgrade
10b
SR ER EW IW
Disable external write
R = Field upgrade
11b
SR ER EW IW
Disable internal write
W = Full protection
Table 3-11. Protection Level Bit Packing
7
6
5
4
3
2
1
0
Block n+3
Block n+2
Block n+1
Block n
Table 3-12. TableRead Parameters (06h)
Name
Address
Type
Description
KEY1
0,F8h
RAM
3Ah.
KEY2
0,F9h
RAM
Stack Pointer value+3, when
SSC
is
executed.
BLOCKID
0,FAh
RAM
Table number to read.
Table 3-13. EraseAll Parameters (05h)
Name
Address
Type
Description
KEY1
0,F8h
RAM
3Ah.
KEY2
0,F9h
RAM
Stack Pointer value+3, when
SSC
is
executed.
