enCoRe™ V CY7C643xx, enCoRe™ V LV CY7C604xx TRM, Document No. 001-32519 Rev *H
152
Full-Speed USB
20.3.9
EPx_CNT0 Register
The Endpoint Count Register 0 (EPx_CNT0) is used for con-
figuring endpoints 1 through 8.
Bit 7: Data Toggle.
This bit selects the data packet's toggle
state. For IN transactions, firmware must set this bit to the
expected state. For OUT transactions, the hardware sets
this bit to the state of the received Data Toggle bit. ‘0’ is
DATA0. ‘1’ is DATA1.
Bit 6: Data Valid.
This bit is used for OUT transactions only
and is read only. It is cleared to '0' if CRC, bit stuffing errors,
or PID errors occur. This bit does not update for some end-
point mode settings. ‘0’ is error in data received. ‘1’ is no
error.
Bit 0: Count MSB.
This bit is the one MSb of a 9-bit coun-
ter. The LSb are the Data Count[7:0] bits of the EPx_CNT1
register. Refer to the
for more informa-
tion.
For additional information, refer to the
Address
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Access
0,40h
EP1_CNT0
Data Toggle
Data Valid
Count MSB
# : 0
0,42h
EP2_CNT0
Data Toggle
Data Valid
Count MSB
# : 0
0,44h
EP3_CNT0
Data Toggle
Data Valid
Count MSB
# : 0
0,46h
EP4_CNT0
Data Toggle
Data Valid
Count MSB
# : 0
0,48h
EP5_CNT0
Data Toggle
Data Valid
Count MSB
# : 0
0,4Ah
EP6_CNT0
Data Toggle
Data Valid
Count MSB
# : 0
0,4Ch
EP7_CNT0
Data Toggle
Data Valid
Count MSB
# : 0
0,4Eh
EP8_CNT0
Data Toggle
Data Valid
Count MSB
# : 0
