CyberResearch MXGC Series, User Manual

Page: 7 / 268

MXGC Series
CyberResearch
®
Motherboards
CyberResearch, Inc . vii
25 Business Park Drive P: (203) 483-8815; F: (203) 483-9024
Branford, CT USA www.cyberresearch.com
2.5.7 Intel
®
ICH8DO Low Pin Count (LPC) Interface............................................. 21
2.5.8 Intel
®
ICH8DO Real Time Clock ..................................................................... 21
2.5.9 Intel
®
ICH8DO SATA Controller ..................................................................... 21
2.5.10 Intel
®
ICH8DO USB Controller .................................................................... 22
2.6 I
NTEL
® ICH8DO PCI
E
B
US
C
OMPONENTS
.............................................................. 23
2.6.1 PCIe Bus Overview .......................................................................................... 23
2.6.2 PCIe x4 Interface Goldfinger........................................................................... 23
2.6.3 PCIe GbE Ethernet .......................................................................................... 24
2.7 PCI B
US
C
OMPONENTS
............................................................................................ 26
2.7.1 PCI Bus Overview............................................................................................ 26
2.7.2 PCI Expansion Sockets .................................................................................... 26
2.8 LPC B
US
C
OMPONENTS
........................................................................................... 26
2.8.1 LPC Bus Overview........................................................................................... 26
2.8.2 Super I/O chipset.............................................................................................. 27
2.8.2.1 Super I/O LPC Interface ........................................................................... 28
2.8.2.2 Super I/O 16C550 UARTs ........................................................................ 28
2.8.2.3 Super I/O Enhanced Hardware Monitor ................................................... 28
2.8.2.4 Super I/O Fan Speed Controller................................................................ 28
2.8.2.5 Super I/O Keyboard Controller................................................................. 29
2.8.3 Serial Port Chipset........................................................................................... 29
2.9 E
NVIRONMENTAL AND
P
OWER
S
PECIFICATIONS
....................................................... 29
2.9.1 System Monitoring ........................................................................................... 29
2.9.2 Operating Temperature and Temperature Control........................................... 30
2.9.3 Power Consumption......................................................................................... 31
3.1 A
NTI
-
STATIC
P
RECAUTIONS
...................................................................................... 34
3.2 U
NPACKING
.............................................................................................................. 34
3.2.1 Unpacking Precautions.................................................................................... 34
3.3 U
NPACKING
C
HECKLIST
........................................................................................... 35
3.3.1 Package Contents............................................................................................. 35
3.4 O
PTIONAL
I
TEMS
...................................................................................................... 37
4.1 P
ERIPHERAL
I
NTERFACE
C
ONNECTORS
..................................................................... 40
4.1.1 MXGC Series Layout ....................................................................................... 40
4.1.2 Peripheral Interface Connectors ..................................................................... 41
4.1.3 External Interface Panel Connectors............................................................... 42
4.2 I
NTERNAL
P
ERIPHERAL
C
ONNECTORS
...................................................................... 43