Curtiss-Wright SCRAMNet+ SC150 VME6U, Hardware Reference Manual

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OPERATION
Copyright 2007 5-6 VME6U HARDWARE REFERENCE
The PLUS mode allows variable-length message packets in which sequentially addressed
data in the Transmit FIFO is transferred as a block in a single packet. Both BURST
modes are open loop, non-error-corrected modes of operation.
The node appends 4-byte data values with sequential addresses until the maximum of 256
or 1024 bytes is reached, a non-sequential address is detected, the Transmit FIFO is
empty, or a transmit interrupt event is detected. In both BURST and PLATINUM modes,
the node is permitted to have multiple packets on the ring simultaneously.
The transmission of a PLUS mode message is an automatic function, and for the most
part, cannot be controlled. If the appropriate PLUS mode bits are set in the control
registers, then the following algorithm applies:
1. If Transmit FIFO is empty, end transmission.
2. If the address field is not equal to the address of the previous transm 4,
end transmission.
3. If length limit overflow for PLUS mode operation occurs, end transmission.
4. ELSE transmit the four data bytes and when done GOTO step 1.
To maintain a PLUS mode transmission, step 1 requires that new data is written to the
SCRAMNet
+
board at a rate greater than or equal to 16.7 MB/sec; this is a 32-bit
WRITE every 240 ns. Any delay in the host data WRITE will result in failure of step 1,
and a premature end to the PLUS mode transmission.
While this method results in the reliable generation of a PLUS mode transmission, it
increases the node latency. The SCRAMNet
+
device automatically increases PLUS
mode throughput (when blocking is not used) when needed due to high-throughput host,
very busy network, etc.
ERROR CORRECTION
Error correction is the automatic retransmission of a SCRAMNet Network message when
the original message is received in error by the originating node. The message will be
retransmitted indefinitely until it is received correctly. During transmit retry, the same
message is being sent. This prevents any new messages from being transmitted by this
node. The Transmit FIFO will hold these new messages until the retry message is
received correctly.
If the original message is received by the originating node with some type of bit error,
then this results in the transmit retry bit in CSR1 being set. If the original message is not
received by the originating node in the time-out period specified in CSR5, then this
results in the transmit retry time-out bit in CSR1 being set. The time-out period is based
on the number of nodes in the network ring and the total length of cable used.
5.5.3 Performance
NODE LATENCY
Node latency is an important factor in networked application in real-time systems design.
Data transfer around the network, while fast, does have a measurable delay.
Node latency can be defined as the time delay at a node before a foreign message can be
retransmitted. This delay is a minimum of 247 ns; the time to transmit one byte. The
maximum node latency depends on the maximum message size and could be from 800 ns
to 61.8 µs, depending on the message length selection. To approximate the total
maximum delay on the network, multiply the maximum node latency by the number of