Curtiss-Wright SCRAMNet+ SC150 VME6U, Hardware Reference Manual

Page: 147 / 162

CONFIGURATION AIDS
Copyright 2007 F-1 VME6U HARDWARE REFERENCE
SCRAMNet
+
CONTROL/STATUS REGISTERS REFERENCE SHEET
CSR 0 CSR 2 CSR 4
CSR 6
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
RX ENB
TX ENB
REDUND LINK TOGGLE
HOST INT ENB
AUX CTRL RAM ENB
INT MEM MASK MATCH
OVRD RIE FLAG
INT ON ERRORS
NET INT ENB
OVRD TIE FLAG
ENB TX DATA FILTER
ENB LOWER 4K FILTER
RST TX/RX FIFO
RST INT FIFO
RST TX FIFO
INSERT NODE 0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
available to host
available to host
available to host
available to host
available to host
available to host
DSB FO LPBCK
ENB WIRE LPBCK
DSB HOST TO SM WRT
ENB WRT OWN SLOT
ENB INT RX OWN SLOT
MSG LENGTH LIMIT
VAR LENGTH MSGS
ENB HIPRO WRITE
MULT NATIVE MSGS
NO NTWK ERR CRCT 0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
always 0
always 0
RFA 2
RX FIFO
ADDRESS
FIELD
RFA 15
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
data intrpt vector
data intrpt vector
data intrpt vector
data intrpt vector
data intrpt vector
data intrpt vector
data intrpt vector
data intrpt vector
reserved
reserved
reserved
reserved
reserved
reserved
reserved
reserved
ACR LED STATUS
0
1
2
3
RIE
TIE
EXT TRG 1
EXT TRG 2
4
5
6
7
HIPRO ENB
reserved
reserved
reserved
G
G
G
Y
INSERT
MESSAGE WAITING
CARRIER DETECT
ERROR
G
G NATIVE MESSAGE
FOREIGN MESSAGE
CSR 1 (READ RESET) CSR 3 CSR 5 CSR 7
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
TX FIFO FULL
TX FIFO NOT EMPTY
TX FIFO 7/8 FULL
always 0
INT FIFO FULL
PROTOCOL VIOLATION
CARRIER DETECT FAIL
BAD MESSAGE
RX OVERFLOW
TX RETRY
TX RETRY TIME-OUT
REDUND TXRX FAULT
GP CTR/TIMER OVRFLO
CURRENT LINK FOR USE
INTERRUPTS ARMED *
FO BYPASS NOT CNCTD
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
NN0
NUMBER
OF
NODES
NN7
TXID0
NODE ID
TXID7 0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
RFA16
RX FIFO
ADDRESS
(MSW)
RFA22
reserved
reserved
reserved
reserved
reserved
reserved
reserved
RF RETRY
INT FIFO NOT EMT
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
error intrpt vector
error intrpt vector
error intrpt vector
error intrpt vector
error intrpt vector
error intrpt vector
error intrpt vector
error intrpt vector
reserved
reserved
reserved
reserved
reserved
reserved
reserved
reserved
*
Write to CSR1 to re-arm interrupts.