Curtiss-Wright FHB5-PE1MWB04-00, User Manual, Page: 61 / 72

APPENDIX D
10-3
FibreXtreme User Guide Copyright 2017
10.1 FPDP Information
This section provides a brief discussion of Front Panel Data Port (FPDP). For more information
about FPDP, refer to Front Panel Data Port Specifications, ANSI/VITA 17-1998 or go to the
VITA website at: www.vita.com/vso/. The SL240 PCIe cards implement a serial version of
FPDP on their link interface, which is standard VITA 17.1. Most of the concepts from the
parallel FPDP specification are applicable to the Serial FPDP world, so they are described here.
Many real-time systems require high-speed, low-latency data transfers on a sustained basis.
However, the primary bus (for example, VME bus) cannot provide the required bandwidth and
latency at all times because of bus contention. The primary bus must also handle other tasks such
as system control. The FPDP bus provides a solution to this problem. Using FPDP, two or more
cards are connected by a simple, parallel, synchronous interface using 80-conductor ribbon cable
running across the cards’ front panels or through a 2.5 Gbps serial interface. For parallel FPDP,
devices on the FPDP bus must consist of one FPDP Transmit Master (FPDP-TM) and one
FPDP Receive Master (FPDP-RM). Multiple FPDP Receiver (FPDP-R) devices may also exist
on the bus. For Serial FPDP, there is one master for the bus (which acts as FPDP-TM and
FPDP-RM), and one or more receiver nodes. Since only one FPDP-TM can exist on the bus, no
bus contention between devices is possible. Figure 8-1 shows an example VME FPDP card
interconnection using parallel FPDP.