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6-4
FibreXtreme User Guide
OPERATION
Copyright 2017
6.2.2 Transmit Operation
The transmit operation must first collect data in the transmit FIFO for transmission. This means
that either data is PIO’d into the Transmit FIFO or a DMA transaction is set up to fill the FIFO.
Once a data word is in the FIFO, transmission can begin. The framing-state machine first checks
that there is no data in the retransmit FIFO and that the remote node is not telling this node to
back off. If it is clear to send, after it transmits the next SOF it will begin filling the data frame as
full as possible (up to 2048 bytes). The data is then encoded and sent out across the link. If there
is data in the Retransmit FIFO or the card is being backed off from the destination, then the card
waits until both conditions are clear before it starts transmission. Note that SYNC and SWDV can
also be transmitted by the link logic and these two types of synchronization primitives are handled
by the Transmit FIFO and transmit control logic in a similar method as standard data.
Specifically, they are written to the link logic through the same interface, passed through the same
internal link logic path, and are used in the assembly of link frames in a similar fashion, although
the maximum frame size does differ for these types of associated Serial FPDP frames.
All FPDP signals, with the exclusion of /SYNC, are passed around the transmit FIFO, and are not
synchronized with the data stream. The FPDP signals can be written to a register and then
transmitted across the link.
6.2.3 Loop Operation
Loop operation with the SL240 PCIe acts like a virtual FPDP bus where one source (the loop
master) can transmit to any number of receive nodes. The link protocol is the same for this
operation, except any node in the loop may assert a suspend request embedded in this data
stream. This implies that if one node on the loop is not ready to receive data, the source is backed
off for all nodes. This is the same way that multi-drop FPDP busses function.
The fundamental difference between a loop master and a receiving node is the loop master does
not have its loop retransmission enabled. Therefore, to the loop master, it appears as if it is still in
a point-to-point connection with a single node. Receiving nodes, on the other hand, have
knowledge that they are in a loop configuration and must be configured as such. Note that the
loop master receives all the data it transmits, so data can either be checked for errors or ignored
when it is received. This checking (beyond verification of CRC and 8B/10B decoding validity) is
not done in the SL240 PCIe and must be implemented by the system designer.
The receivers on the loop can choose to collect the data or ignore it off the loop. If the Receive
FIFO is enabled (the node is collecting data), a suspend request may be asserted by this node as
the data passes through. If it is not configured to receive the data, it simply passes the data
through the Retransmit FIFO without modifying the suspend request.
Serial FPDP supports the DIR, NRDY, PIO1, and PIO2 FPDP signals. These signals do not
propagate through the Transmit FIFO or the Receive FIFO and thus cannot be directly associated
with the corresponding data. To guarantee a pulse on these signals is propagated to the remote
Serial FPDP receiver, the pulse width from the host-bus interface must be equal to or greater
than the maximum Serial FPDP frame length (512 words of data with an overhead of nine
ordered sets).
The values of PIO1 and PIO2 are retransmitted according to their received link values and the
values of DIR and NRDY are used as follows: if the receive interface is enabled, the values
transmitted are the received link values logically ORed with the PCIe host-interface values;
otherwise, the values are retransmitted according to their received link values. The values of these
four signals sent to and received from the link are placed in the register set and then can be
accessed by software. These signals are typically used for application-dependent signaling
between nodes. The use of DIR and NRDY is consistent with the use of flow control
(retransmission of a STOP request) for loop operation. See the VITA 17.1 Serial FPDP
specification for additional details.
Summary of Contents for FHB5-PE1MWB04-00
Page 1: ...Document No F T MU S2PCIENF A 0 A3 SL100 SL240 Multi Channel PCIe User Guide FibreXtreme ...
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Page 7: ...SL100 SL240 1 FOREWORD ...
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Page 11: ...SL100 SL240 2 INTRODUCTION ...
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Page 17: ...SL100 SL240 3 TECHNICAL SUPPORT ...
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Page 21: ...SL100 SL240 4 PRODUCT OVERVIEW ...
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Page 31: ...SL100 SL240 5 INSTALLATION ...
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Page 37: ...SL100 SL240 6 OPERATION ...
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Page 43: ...SL100 SL240 7 APPENDIX A ...
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Page 47: ...SL100 SL240 8 APPENDIX B ...
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Page 55: ...SL100 SL240 9 APPENDIX C ...
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Page 59: ...SL100 SL240 10 APPENDIX D ...
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