4. Functions
CNT32-4MT(LPCI)
49
Zero-clear
The counter is cleared to zero. Zero-clear methods are listed in the table below.
The zero-clear method is software-selectable.
Table 4.3. Zero-clear
Item Factor
Description
Note
Software command
Possible to preset for all
channels
Always available
Phase-Z input
Phase-Z input level change
Always available
Control input signal
(rise)
Level change
Available only when the
control input signal has been
selected for Zero-clearing.
Control input signal (fall) Level change
Available only when the
control input signal has been
selected for Zero-clearing.
Count match(Register0) Count value = Comparison
register 0
Zero-clear method
Count match(Register1) Count value = Comparison
register 1
Software
The counter is zero-cleared by software either for each channel or for all channels.
Phase-Z Input
The counter is zero-cleared by the external phase-Z input signal. Software is used to select positive or
negative logic and to enable or disable zero-clearing.
Rise/fall of an external input signal
The counter is zero-cleared by an external input signal supplied through the control input pin. The
control input pin is used for preset signal input. The rising or falling edge of the signal can be selected.
* When the control input pin is used for zero-clearing, it cannot be used for the counter start/stop,
preset, or general-purpose input.
Count match
The counter is zero-cleared when the count value matches the value in comparison register 0 or 1.
Register
The board has a preset register and comparison registers.
Preset Register
The preset register is a 32-bit register to load the value in the preset register to the counter when
presetting occurs.
Comparison register 0, Comparison register 1
These are 32-bit registers. A variety of events can occur when the counter value matches the value in
comparison register 0 or 1.
