6. Appendix
BX-961D Series User’s Manual
49
SERIAL I/O Address and Register Function
The following table lists the I/O addresses in case of SERIAL A.
Table 6.5. I/O Address
I/O address DLAB Read/Write
Register
03F8H
0
W
Transmitter holding register
THR
R
Receive buffer register
RBR
1
W
Divisor latch register (LSB)
DLL
03F9H
1
W
Divisor latch register (MSB)
DLM
0
W
Interrupt enable register
IER
03FAH
X
R
Interrupt ID register
IIR
03FBH
X
W
Line control register
LCR
03FCH
X
W
Modem control register
MCR
03FDH
X
R
Line status register
LSR
03FEH
X
R
Modem status register
MSR
03FFH
X
R/W
Scratch register
SCR
DLAB (Divisor Latch Access Bit) : The value in bit 7 of the line control register.
Summary of Contents for BOX-PC 961D Series
Page 1: ...IPC Series BOX PC 961D Series Fanless Core i7 610E 2 53GHz User s Manual CONTEC CO LTD ...
Page 7: ...vi BX 961D Series User s Manual ...
Page 27: ...3 Hardware Setup 20 BX 961D Series User s Manual ...
Page 49: ...5 BIOS Setup 42 BX 961D Series User s Manual ...
Page 57: ...6 Appendix 50 BX 961D Series User s Manual Table 6 6 Function of Each Register 1 3 ...
Page 58: ...6 Appendix BX 961D Series User s Manual 51 Table 6 6 Function of Each Register 2 3 ...
Page 59: ...6 Appendix 52 BX 961D Series User s Manual Table 6 6 Function of Each Register 3 3 ...