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5.14
LPC Interfaces
On the conga-MEVAL, the module’s LPC interface is routed to:
•
LPC header CN7
•
Optional discrete TPM chip
•
LPC Super I/O controller for serial port support
•
Xilinx CPLD for postcode display
Use jumper X104 (optional) to enable or disable the optional onboard LPC TPM module. Use jumper X105 to enable or disable the onboard
LPC Super I/O controller.
5.15
LPC Header
The LPC interface from the module is also routed to connector CN7, a 14-pin header. Connector CN7 supports external TPM or Super I/O
modules that are compliant with LPC specification.
For external TPM support, disable onboard TPM chip via jumper X104 if available. For external Super I/O support, disable the onboard Super
I/O controller via jumper X105.
Table 41 CN7 - LPC Header
Pin Signals
Pin Signals
1
GND
2
LPC_FRAME#
3
LPC_CLK
4
LPC_AD3
5
KEY
6
LPC_AD2
7
PLT_RST#
8
LPC_AD1
9
VCC3V3
10
LPC_AD0
11
N.C
12
LPC_SERIRQ
13
VCC3V3_SBY
14
LPC_DRQ#
Table 42 X104 - Onboard TPM Activation
Pin
Configuration
1-2
Enable the optional onboard TPM if available (default)
2-3
Disable optional onboard TPM if available
1
3
7
9
Key
13
11
2
4
6
8
10
12
14
CN7
2
3
1
X104
