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TCTLm02

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Block Diagram

PECI

PCIe 0-4 (Gen 3)

DDR4 Channel A
DDR4 Channel B

DDI TCP0

DDI TCP1

DDI TCP2

PCIe x4 Gen 4

DDIB

eDP

SM Bus

eSPI

SATA 0/PCIe 6

SATA 1/PCIe 5

PCIe

MIPI-CSI2

HDA

SPI0

MGMNT

Gen. Intel

Core

™

“Tiger Lake”

MCP UP3 Processor

USB 3.2 Port 3/PCIe 7

8x USB 2.0

USB 3.2 Port 0-2

SPI Flash 0

TPM

Ethernet 10/100/1000/2500

Intel i225LM/V/IT

eDP to LVDS

eSPI to LPC

MUX

DP to VGA

SATA0/PCIe6

SATA0

SATA1/PCIe5

SATA1

PCIe6

USB 3.2 Port 3

PCIe7

PCIe5

PCIe0-4

Optional - Not available by default

congatec

Board

Controller

Generation

LPC

GPIO

SMB

UART

I2C

LID/SLEEP/FAN

2x DDR4 320

SO-DIMM

up to 32GB each

Ethernet

HD Audio

SM Bus

SPI

VGA

LVDS/eDP

LPC

I2C Bus

USB 2.0 Port 0 - 7

SATA Port 0 - 1

SER0/1

GPIOs

LID# / SLEEP# / FAN

PCIe lane 0 - 7 (Gen 3)

1 PCIe x4 Gen 4 (PEG)

USB 3.2 Port 0 - 3

DDI 2

DDI 1

DDI 3

MIPI-CSI2

Summary of Contents for 050300

Page 1: ...COM Express conga TC570 11th Generation Intel Core i7 i5 i3 and Celeron Single Chip IOT UP3 Processors User s Guide Revision 0 2 Preliminary...

Page 2: ...7 Revision History Revision Date yyyy mm dd Author Changes 0 1 2021 05 10 AEM Preliminary release 0 2 2021 07 31 AEM Added Software License Information Removed duplicated sentence about non monotonic...

Page 3: ...ongatec com en licenses Search for the revision of the BIOS UEFI or Board Controller Software as shown in the POST screen or BIOS setup to get the complete product related license information To the e...

Page 4: ...cally qualified personnel It is not intended for general audiences Lead Free Designs RoHS All congatec GmbH designs are created from lead free components and are completely RoHS compliant Electrostati...

Page 5: ...loss of data Note Notes call attention to important information that should be observed Trademarks Product names logos brands and other trademarks featured or referred to within this user s guide or t...

Page 6: ...number from congatec GmbH prior to returning the non conforming product freight prepaid congatec GmbH will pay for transporting the repaired or exchanged product to the customer Repaired replaced or...

Page 7: ...t you If you still require assistance after visiting our website then contact our technical support department by email at support congatec com Terminology Term Description EU Execution Unit GB Gigaby...

Page 8: ...1 6 Gigabit Ethernet 28 5 1 7 High Definition Audio 28 5 1 8 LPC Bus 28 5 1 9 I C Bus 28 5 1 10 GPIOs 28 5 1 11 General Purpose Serial Interface 29 5 1 12 Power Control 29 5 1 13 Power Management 32 6...

Page 9: ...or Signal Descriptions 42 8 2 Bootstrap Signals 64 9 System Resources 65 9 1 I O Address Assignment 65 9 1 1 LPC Bus 65 9 2 PCI Configuration Space Map 65 10 BIOS Setup Description 66 10 1 Navigating...

Page 10: ...DisplayPort DP Signal Descriptions 52 Table 20 Embedded DisplayPort Signal Descriptions 53 Table 21 CRT Signal Descriptions 54 Table 22 LVDS Signal Descriptions 54 Table 23 Serial ATA Signal Descripti...

Page 11: ...re legacy free design no Super I O PS 2 keyboard and mouse and provide most of the functional requirements for any application These functions include but are not limited to a rich complement of conte...

Page 12: ...q 1 35 GHz 1 30 GHz 1 25 GHz 1 25 GHz DDR4 Memory ECC or Non ECC 3200 MTps dual channel Non ECC 3200 MTps dual channel Non ECC 3200 MTps dual channel Non ECC 3200 MTps dual channel Non ECC Processor T...

Page 13: ...ntel QuickSync Clear Video Technology HD hardware accelerated video decode encode processing transcode Up to four independent displays see table 10 Display Combination and Resolution 3x DP DP HDMI DVI...

Page 14: ...he following operating systems Microsoft Windows 10 IoT Enterprise 64 bit Linux Ubuntu 64 bit Real Time Systems Hypervisor Note 1 The processor supports only 64 bit operating systems 2 The CSM Compati...

Page 15: ...sumed Conversion Efficiency Max Load Power Watts VCC_12V 12 12 11 4 12 6 11 4 100 137 85 116 VCC_5V SBY 2 5 4 75 5 25 4 75 50 9 VCC_RTC 0 5 3 2 5 3 3 20 2 4 2 Rise Time The input voltages shall rise f...

Page 16: ...ripherals except the LCD monitor were disconnected before measurement Table 7 Power Consumption Values The table below provides additional information about the conga TC570 power consumption The value...

Page 17: ...MOS battery For more information refer to application note AN9_RTC_Battery_Lifetime pdf on congatec GmbH website at www congatec com support application notes 4 We recommend to always have a CMOS batt...

Page 18: ...net 10 100 1000 2500 Intel i225LM V IT eDP to LVDS eSPI to LPC MUX MUX MUX MUX MUX DP to VGA SATA0 PCIe6 SATA0 SATA0 SATA1 PCIe5 SATA1 SATA1 PCIe6 PCIe6 USB 3 2 Port 3 PCIe7 PCIe7 PCIe5 PCIe5 PCIe0 4...

Page 19: ...he environmental conditions it is subjected to For more information about this subject contact your local congatec sales representative and request the gap pad material manufacturer s specification Ca...

Page 20: ...yright 2021 congatec GmbH TCTLm02 20 67 4 1 CSA Dimensions M2 5 x 11 mm threaded standoff for threaded version or 2 7 x 11 mm non threaded standoff for borehole version 87 95 87 95 37 25 76 62 4 25 5...

Page 21: ...ght 2021 congatec GmbH TCTLm02 21 67 4 2 CSP Dimensions M2 5 x 11 mm threaded standoff for threaded version or 2 7 x 11 mm non threaded standoff for borehole version 87 87 95 57 6 37 25 95 24 3 76 62...

Page 22: ...ight 2021 congatec GmbH TCTLm02 22 67 4 3 HSP Dimensions M2 5 x 11 mm threaded standoff for threaded version or 2 7 x 11 mm non threaded standoff for borehole version 87 37 25 57 6 87 62 4 76 4 4 11 9...

Page 24: ...tor The conga TC570 supports the following up to 8 GTps Gen 3 speed a 6x1 link default configuration with SATA ports enabled 1 2 3 a 1 x4 2 x1 link or 2 x2 2 x1 link or 1 x2 4 x1 link via a special cu...

Page 25: ...60 Hz 36 bpp LVDS or eDP 1920x1200 60 Hz dual LVDS mode 4096x2304 60 Hz 24 bpp Option 2 DP 4096x2304 60 Hz 36 bpp DP 4096x2304 60 Hz 36 bpp DP 4096x2304 60 Hz 36 bpp VGA 1920x1200 60 Hz Option 3 DP 40...

Page 26: ...ppings automatic panel detection via Embedded Panel Interface based on VESA EDIDTM 1 3 resolution up to 1920x1200 in dual LVDS channel mode The eDP 1 2 interface supports eDP 1 4 specification Spread...

Page 27: ...or and up to four SuperSpeed signals on the C D connector The xHCI host controller supports USB 3 2 specification SuperSpeedPlus SuperSpeed High Speed Full Speed and Low Speed USB signaling data trans...

Page 28: ...the conga TC570 module 3 For real time applications we recommend to use conga TC570 industrial variants for Intel TCC TSN feature 4 Not supported in Windows Operating Systems 5 1 7 High Definition Au...

Page 29: ...ltage regulator circuitry A high value indicates that the power is good and the module can start its onboard power sequencing Carrier board hardware must drive this signal low until all power rails an...

Page 30: ...e only around 0 8 V when the 12 V is applied to the module Actively driving PWR_OK high is compliant to the COM Express specification but this can cause back driving Therefore congatec recommends driv...

Page 31: ...OS settings or by system software Standard 12V Power Supply Implementation Guidelines The 12 volt input power is the sole operational power source for the conga TC570 Other required voltages are gener...

Page 32: ...n while in S3 S4 S5 In the Deep Sx state the system entry condition determines if the system context is maintained or not All power is shut off except for minimal logic which supports limited set of w...

Page 33: ...he following features 6 1 1 Board Information The cBC provides a rich data set of manufacturing and board information such as serial number EAN number hardware and firmware revisions and so on It also...

Page 34: ...four wire fan must be used to generate the correct speed readout 2 For the correct fan control FAN_PWMOUT FAN_TACHIN implementation see the COM Express Design Guide 6 1 7 Enhanced Soft Off State The...

Page 35: ...dd OEM boot logo to the congatec Embedded BIOS 6 2 3 OEM POST Logo This feature allows system designers to replace the congatec POST logo displayed in the upper left corner of the screen during BIOS P...

Page 36: ...ted on the I2C bus and the SMBus This gives the system designer more flexibility when choosing the appropriate battery sub system For more information about the supported Battery Management Interface...

Page 37: ...ce frequency and voltage adaptively The Adaptive Thermal Monitor will remain active as long as the package temperature remains at its specified limit Therefore the Adaptive Thermal Monitor will contin...

Page 38: ...ntrol CPPC2 and is supported by newer operating systems Win 8 1 or newer With this feature enabled the processor autonomously selects performance states based on workload demand and thermal limits whi...

Page 39: ...ble for allowing the operating system to play an important part in the system s thermal management This results in the operating system having the ability to implement cooling decisions according to t...

Page 40: ...ress WAKE Wakes unconditionally from S3 S5 WAKE Wakes unconditionally from S3 PME Activate the wake up capabilities of a PCI device using Windows Device Manager configuration options for this device O...

Page 41: ...sted For information about the internal pull ups or pull downs implemented by the chip vendors refer to the respective chip s datasheet Table 12 Signal Tables Terminology Descriptions Term Description...

Page 42: ...BE0_MDI0 B13 SMB_CK A68 PCIE_TX0 B68 PCIE_RX0 A14 GBE0_CTREF 1 B14 SMB_DAT A69 PCIE_TX0 B69 PCIE_RX0 A15 SUS_S3 B15 SMB_ALERT 3 A70 GND FIXED B70 GND FIXED A16 SATA0_TX B16 SATA1_TX A71 eDP_TX2 LVDS_A...

Page 43: ...VGA_I2C_CK A41 GND FIXED B41 GND FIXED A96 TPM_PP B96 VGA_I2C_DAT A42 USB2 B42 USB3 A97 TYPE10 1 B97 SPI_CS A43 USB2 B43 USB3 A98 SER0_TX B98 RSVD 1 A44 USB_2_3_OC B44 USB_0_1_OC A99 SER0_RX B99 RSVD...

Page 44: ...EG_RX5 1 D69 PEG_TX5 1 C15 DDI1_PAIR6 1 D15 DDI1_CTRLCLK_AUX C70 GND FIXED D70 GND FIXED C16 DDI1_PAIR6 1 D16 DDI1_CTRLDATA_AUX 3 C71 PEG_RX6 1 D71 PEG_TX6 1 C17 RSVD D17 RSVD C72 PEG_RX6 1 D72 PEG_TX...

Page 45: ...ND C42 DDI3_PAIR1 D42 DDI2_PAIR1 C97 RVSD 1 D97 RSVD 1 C43 DDI3_PAIR1 D43 DDI2_PAIR1 C98 PEG_RX14 1 D98 PEG_TX14 1 C44 DDI3_HPD D44 DDI2_HPD C99 PEG_RX14 1 D99 PEG_TX14 1 C45 RSVD 1 D45 RSVD 1 C100 GN...

Page 46: ...PCIE_TX4 A55 A56 PCI Express channel 4 Transmit Output differential pair O PCIE PCIE_RX5 PCIE_RX5 B52 B53 PCI Express channel 5 Receive Input differential pair I PCIE Shared with SATA port 1 and conf...

Page 47: ...O PCIE PEG_RX4 PEG_RX4 C65 C66 PCI Express Graphics differential pairs 4 Note Can also be used as PCI Express differential pairs 20 I PCIE Not connected PEG_TX4 PEG_TX4 D65 D66 O PCIE PEG_RX5 PEG_RX5...

Page 48: ...rential pairs 28 I PCIE PEG_TX12 PEG_TX12 D91 D92 O PCIE PEG_RX13 PEG_RX13 C94 C95 PCI Express Graphics differential pairs 13 Note Can also be used as PCI Express differential pairs 29 I PCIE PEG_TX13...

Page 49: ...LDATA if DDI1_DDC_AUX_SEL is pulled high I O PCIE I O OD 3 3 V PU 100 k 3 3V Bootstrap signal see note below DDI enable strap already populated DDI1_DDC_AUX_SEL D34 Selects the function of DDI1_CTRLCL...

Page 50: ...O PCIE I O OD 3 3 V PD 100 k DDI3_CTRLDATA_AUX 1 C37 Multiplexed with DP3_AUX and HDMI3_CTRLDATA DP AUX function if DDI3_DDC_AUX_SEL is no connect HDMI DVI I2C CTRLDATA if DDI3_DDC_AUX_SEL is pulled...

Page 51: ...with DDI2_CTRLCLK_AUX I O OD 3 3 V PD 100 k HDM12_CTRLDATA 1 C33 TMDS I2 C Control Data Multiplexed with DDI2_CTRLDATA_AUX I O OD 3 3 V PU 100 k 3 3 V Bootstrap signal see note below Enable strap alr...

Page 52: ...100 k 3 3 V Bootstrap signal see note below DP enable strap is already populated DP2_LANE3 DP2_LANE3 D49 D50 Uni directional main link for the transport of isochronous streams and secondary data Mult...

Page 53: ...and EDID access I O PCIE PD 100 k DP3_AUX 1 C37 Half duplex bi directional AUX channel for services such as link configuration or maintenance and EDID access I O PCIE PU 100 k 3 3 V Bootstrap signal s...

Page 54: ...face on industrial variants you need a customized conga TC570 variant assembly option Table 22 LVDS Signal Descriptions Signal Pin Description I O PU PD Comment LVDS_A0 LVDS_A0 LVDS_A1 LVDS_A1 LVDS_A2...

Page 55: ...tial pair O SATA SATA3_RX SATA3_RX B25 B26 Serial ATA channel 3 receive input differential pair I SATA Not connected SATA3_TX SATA3_TX B22 B23 Serial ATA channel 3 transmit output differential pair O...

Page 56: ...carrier board USB0_HOST_ PRSNT B48 Module USB client may detect the presence of a USB host on USB0 A high values indicates that a host is present I 3 3 VSB PD 1 M Not Supported Note 1 These signals ha...

Page 57: ...GBE0_LINK1000 2 A5 Gigabit Ethernet Controller 0 1000 Mbps link indicator active low OD 3 3 V GBE0_CTREF A14 Reference voltage for Carrier Board Ethernet channel 0 magnetics center tap The reference...

Page 58: ...ignal Pin Description I O PU PD Comment LPC_AD 0 3 B4 B7 LPC Mode LPC multiplexed address command and data bus I O 3 3 V PU 20 K 3 3 V LPC_FRAME B3 LPC Mode LPC Frame indicates the start of a LPC cycl...

Page 59: ...ring the reset process They may bootstrap some basic important functions of the module For more information refer to section 8 2 Bootstrap Signals Table 30 Miscellaneous Signal Descriptions Signal Pin...

Page 60: ...ides GPIO signals on the COM Express connector by default Table 32 Power and System Management Signal Descriptions Signal Pin Description I O PU PD Comment PWRBTN B12 Power button to bring system out...

Page 61: ...P B103 Sleep button Used by the ACPI operating system to bring the system to sleep state or to wake it up again Note For proper detection assert a pulse width of at least 16 ms I OD 3 3 V PU 100 k 3 3...

Page 62: ...r logic level Table 37 Module Type Definition Signal Description Signal Pin Description I O Comment TYPE0 TYPE1 TYPE2 C54 C57 D57 The TYPE pins indicate to the carrier board the pinout type that is im...

Page 63: ...criptions Signal Pin Description I O PU PD Comment VCC_12V A104 A109 B104 B109 C104 C109 D104 D109 Primary power input 12V nominal All available VCC_12V pins on the connector s shall be used P VCC_5V_...

Page 64: ...if DDI1_DDC_AUX_SEL is pulled high I O OD 3 3 V DDI2_CTRLDATA_AUX C33 Multiplexed with DP2_AUX and HDMI2_CTRLDATA PU 100 k 3 3 V DP2_AUX DP AUX function if DDI2_DDC_AUX_SEL is no connect I O PCIE HDMI...

Page 66: ...u do not have access to the restricted area of the congatec website contact your local congatec sales representative 10 1 Navigating the BIOS Setup Menu The BIOS setup menu shows the features and opti...

Page 67: ...t www congatec com Note 1 Deprecated Caution The DOS command line tool is not officially supported by congatec and therefore not recommended for critical tasks such as firmware updates We recommend to...

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