Copyright
©
2018
congatec
GmbH
TSCOm17
73/75
01h (Note3)
00h
00h
PCIe Device Connected to PEG Root Port 0
02h (Note3)
00h
00h
PCIe Device Connected to PEG Root Port 1
03h (Note3)
00h
00h
PCIe Device Connected to PEG Root Port 2
04h (Note3)
00h
00h
PCIe Device Connected to PCI Express Port 0
05h (Note3)
00h
00h
PCIe Device Connected to PCI Express Port 1
06h (Note3)
00h
00h
PCIe Device Connected to PCI Express Port 2
07h (Note3)
00h
00h
PCIe Device Connected to PCI Express Port 3
08h (Note3)
00h
00h
PCIe Device Connected to PCI Express Port 4
09h (Note3)
00h
00h
PCIe Device Connected to PCI Express Port 5
0Ah (Note3)
00h
00h
PCIe Device Connected to PCI Express Port 6
0Bh (Note3)
00h
00h
PCIe Device Connected to PCI Express Port 7
Note
1. In the standard configuration, the Intel Management Engine (ME) related devices are partly present or not present at all.
2. The PCI Express Ports are visible only if a device is attached to the PCI Express Slot on the carrier board.
3. The table represents a case when a single function PCI/PCIe device is connected to all possible root ports (PEG: in x8 + x4 + x4; PCH: in
8 x1) on the carrier board. The given bus numbers will change based on actual hardware configuration.
4. Internal PCI devices not connected to the conga-TS370 are not listed.
10.3
I
2
C
There are no onboard resources connected to the I²C bus. Address 16h is reserved for congatec Battery Management solutions.
10.4
SM Bus
System Management (SM) bus signals are connected to the Intel
®
chipset. The SM bus is not intended to be used by off-board non-system
management devices. For more information about this subject, contact congatec technical support.
