CIO-DAS801 & 802
ComputerBoards, Inc.
Revision 2
October, 1999
Page 1: ...CIO DAS801 802 ComputerBoards Inc Revision 2 October 1999...
Page 2: ...responsibility is assumed by ComputerBoards Inc for its use nor for any infringements of patents or other rights of third parties which may result from its use No license is granted by implication or...
Page 3: ...erential Inputs 9 2 2 3 Common Mode Voltage Less Than 10V Single Ended Inputs 9 2 2 2 Common Ground Differential Inputs 8 2 2 1 Common Ground Single Ended Inputs 8 2 2 WIRING CONFIGURATIONS 6 2 1 4 De...
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Page 5: ...choose either on a channel by channel basis The set of DIP switches on the board labeled S2 0 through 7 correspond to the channels 0 to 7 of the analog inputs 3 INTERRUPT SELECT JUMPER In order to ta...
Page 6: ...the ability to reject noise which affects both signal high and low and the ability to compensate for ground loops or potentials between signal low and chassis ground Although differential inputs are o...
Page 7: ...2 for typical IRQ assignments Figure 1 4 IRQ Level Select Switches Table 1 2 IRQ Assignments Note IRQ8 15 are AT only LPT IRQ7 UNASSIGNED IRQ15 FLOPPY DISK IRQ6 HARD DISK IRQ14 HARD DISK XT LPT AT IR...
Page 8: ...2 Common Mode voltage on Single Ended Input 2 1 2 Differential Inputs Differential amplifiers amplify the voltage between two distinct input signals Within a certain range referred to as the common m...
Page 9: ...difference between 100V and 101V as 1 Volt because 100V would destroy the board This limitation or common mode range is depicted graphically in Figure 2 5 The common mode range is 10 Volts Even in di...
Page 10: ...PC Place one voltmeter probe on the PC ground and the other on the signal source ground Measure both the AC and DC Volt ages If you do not have access to a voltmeter skip the test and read the followi...
Page 11: ...voltage my be AC DC or both and may be caused by a wide array of phenomena including EMI pickup resistive voltage drops in ground wiring and connections etc Ground offset voltage is a more appropriat...
Page 12: ...n Ground Recommendation Input Configuration Ground Category The following sections have recommended input wiring schemes for input configuration grounding combinations 2 2 1 Common Ground Single Ended...
Page 13: ...ed Inputs This configuration is not recommended Here the term common mode has no meaning in a single ended system and this case would be better described as a system with offset grounds In any case tr...
Page 14: ...D C H H igh C H Low Signal Source with Com m on M ode Voltage Signal source and A D board with com m on m ode voltage connected to a differential input GND The voltage differential between these groun...
Page 15: ...inputs Figure 2 11 shows the recommended connections for this configuration Figure 2 11 Isolated Signal Source Connected to a Differential Input 11 Isolated Signal Source Connected to a Single Ended I...
Page 16: ...rces The manner of configuring the analog inputs and the schematic of those configurations is explained earlier in the manual This section covers the implications of a given connection and shows how t...
Page 17: ...CIO DAS80 are TTL level TTL is an electronics industry term short for Transistor Transis tor Logic with describes a standard for digital signals which are either at TTL low or TTL high levels which a...
Page 18: ...sal Library routines To write to or read from a register in decimal or hexadecimal the following weights apply 80 128 7 40 64 6 20 32 5 10 16 4 8 8 3 4 4 2 2 2 1 1 1 0 HEX VALUE DECIMAL VALUE BIT POSI...
Page 19: ...D2 D3 D4 D5 D6 D7 Register Write Functions Data Bits Function Table 3 2 Control Register Select Coding ID Register Not defined 1 1 Status Register 2 Scan Limits Reg 0 1 Status Register 2 Conversion C...
Page 20: ...Base 3 Base 7 8254 C T 2 Status Register Base 6 8254 C T 1 Status Register Base 5 8254 C T 0 Status Register Base 4 Gain Control Status R0 R1 R2 R3 MA0 MA1 MA2 EACS Base 3 Status Register 1 MA0 MA1 M...
Page 21: ...le Range Select Disable W CSE Register Selection See Table 3 2 W CS1 0 Cascade AD Pacing Mode Enable include CT 2 RW CASC Analog data input Read low byte first R AD 11 0 Table 3 6 Special Programming...
Page 22: ...ee counters two are dedicated to the pacing of analog to digital conversions These two CTR1 and CTR2 when not in use by the A D are available for other tasks but are limited to some extent by the wiri...
Page 23: ...r Interrupt or software polled from 256 sample FIFO buffer Polarity Unipolar Bipolar programmable Channel configuration Differential or pseudo differential with installation of a SIP resistor or singl...
Page 24: ...e selectable Clock input frequency 10 Mhz max High pulse width clock input 30 ns min Low pulse width clock input 50 ns min Gate width high 50 ns min Gate width low 50 ns min Input low voltage 0 8V max...
Page 25: ...irective 89 336 EEC Essential requirements relating to electromagnetic compatibility EU 55022 Class B Limits and methods of measurements of radio interference characteristics of information technology...
Page 26: ...ComputerBoards Inc 16 Commerce Blvd Middleboro MA 02346 Tel 508 946 5100 Fax 508 946 9500 www computerboards com...
