Compaq Professional 5100 Supplementary Manual Download Page 4

T

ECHNOLOGY 

B

RIEF

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4

ECG066/1198

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CPU

CPU

SCSI

Controller

Di
s

k

PCI Slots and
other Devices

PCI

Controller

PCI Slots and
other Devices

PCI

Controller

Graphics

Controller

Memory

Controller

Memory

Controller

Processor Bus
   (533 MB/s)

Memory Bus
 (533 MB/s)

  PCI Bus
(133 MB/s)

Figure 1.  Block diagram of the Highly Parallel System Architecture as implemented in the Compaq
Professional Workstation 6000.  This architecture supports up to four processors in the Compaq
Professional Workstation 8000.

The new Highly Parallel System Architecture implemented by Compaq provides excellent
scalability for increased system performance.  It supports the use of multiple Intel Pentium Pro
processors or Intel Pentium II processors.  Each of these processors has advantages for specific
computing environments; therefore, Compaq is using each of these processors in new products
being developed to meet the widest possible range of customer needs.

Pentium Pro Processor

The Pentium Pro processor family is Intel's current generation of processors for high-end
desktops, workstations, and servers.  This product family consists of processors running at clock
speeds of 150 MHz to 200 MHz with level 2 (L2) memory cache sizes of either 256 KB or 512
KB.  The Compaq Professional Workstation 8000 will use the 200-MHz Pentium Pro processor
with an integrated 512-KB L2 cache that runs at the core processor speed of 200 MHz. The high-
speed processor and cache provide top performance.  Because the larger 512-KB L2 cache holds
more instructions, it provides a higher cache hit rate than the 256-KB cache.  The higher cache
hit rate reduces memory bus traffic and therefore increases performance and scalability of the
system.

Pentium II Processor

The Pentium II processor is the next generation P6 processor from Intel.  Formerly code named
Klamath, the Pentium II processor will be available in 233-MHz, 266-MHz, and 300-MHz
versions, each with an integrated 512-KB L2 cache.  Compaq is implementing 266-MHz and
300-MHz Pentium II processors in the Compaq Professional Workstation 6000.

The Pentium II processor provides some enhancements over the Pentium Pro processor, but it also
has some limitations.  The Pentium II processor incorporates Intel’s MultiMedia Extensions
(MMX) technology.  MMX is the name for 57 multimedia instructions that Intel has added to its
new generation of processors.  This instruction set is expected to significantly improve the
performance of processor-intensive multimedia applications that are MMX-aware.  MMX is
tailored to audio, video, and other multimedia tasks.  An MMX-equipped workstation will use
only one instruction to execute the same task that a Pentium Pro processor would perform using

Summary of Contents for Professional 5100

Page 1: ...tion DCC place growing demands on system resources increasing system bandwidth becomes a critical business issue After evaluating available system architectures Compaq determined that only a new highl...

Page 2: ...TwinTray ROMPaq LicensePaq QVision SLT ProLinea SmartStart NetFlex DirectPlus QuickFind RemotePaq BackPaq TechPaq SpeedPaq QuickBack PaqFax Presario SilentCool CompaqCare design Aero SmartStation Min...

Page 3: ...s from other architectures used in X86 systems ARCHITECTURE OVERVIEW Unlike any previous architecture used in X86 systems the new architecture being implemented by Compaq incorporates a highly paralle...

Page 4: ...sional Workstation 8000 will use the 200 MHz Pentium Pro processor with an integrated 512 KB L2 cache that runs at the core processor speed of 200 MHz The high speed processor and cache provide top pe...

Page 5: ...nd SMP aware applications Each memory bus is 144 bits wide and consists of 128 bits of data plus 16 bits for Error Checking and Correction ECC The new architecture uses buffered 60 ns Extended Data Ou...

Page 6: ...arge CAS Precharge Figure 4 Basic timeline for sequential reads from the same page of DRAM While it is fairly common for a single processor to access consecutive memory locations consecutive cycles in...

Page 7: ...MB 2 x 128 MB 4 512 MB 4 x 64 MB 4 x 64 MB 1 512 MB 6 x 64 MB 2 x 64 MB 2 512 MB 8 x 64 MB 3 512 MB 4 x 128 MB 4 1 GB 8 x 64 MB 4 x 128 MB 1 1 GB 4 x 128 MB 4 x 128 MB 2 1 GB 8 x 128 MB 3 1 GB 4 x 256...

Page 8: ...bus It is controlled by an I O cache controller When a PCI bus master requests data from system memory the I O cache controller automatically reads a full cache line 32 bytes from system memory at the...

Page 9: ...up to 1 07 GB s two to four times the bandwidth of other NT X86 systems Furthermore with dual peer PCI buses high bandwidth peripherals can be placed on separate PCI buses CPU CPU Memory Controller S...

Page 10: ...hics controller to access separate memory pools concurrently Furthermore the ELSA Gloria L 3D graphics board and the Diamond Fire GL 4000 3D graphics board available with the new Compaq workstations h...

Page 11: ...tively However a crossbar switch is an expensive solution in a system with several buses The reason is that all the buses must go into a single chip that has sufficient pins for each bus This requires...

Page 12: ...o memory bus provides bandwidth of 533 MB s Figure 9 Block diagram of the LX architecture The Highly Parallel System Architecture supports industry standard EDO memory arranged in 2 1 interleaved bank...

Page 13: ...eaks of up to 40 percent Thus PCI graphics cards still have headroom to double performance without saturating the PCI bus The dual PCI buses in the Highly Parallel System Architecture in some cases pr...

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