Commodore C-128 Service Manual Download

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Summary of Contents for C-128

Page 1: ...e of the information con tained herein The listing of any available refJlace ment part herein does not constitute in any c se a recommendation warranty or guaranty as C quality or suitability of such...

Page 2: ...ENERATOR 30 VIDEO INTERFACE 31 8564 VIDEO INTERFACE CHIP 33 8563 VIDEO CONTROLLER 36 I O INPUT OUTPUT CIRCUITS 39 CASSETTE INTERFACE 39 KEYBOARD 41 EXPANSION BUS 42 SERIAL BUS 44 TROUBLESHOOTING COMMO...

Page 3: ...n 80 x 25 Lines 640 x 200 resolution 16 Colors 8 Sprites 40 Column Only Z80 Microprocessor CP MTM Plus Version 3 0 128K RAM Expandable to 512K Using RAM Disk Option 40 x 25 Lines 320 x 200 resolution...

Page 4: ...by Commodore and are indicated on the parts list by a C TOP CASE ASSY Top Case C 251987 01 Keyboard C 310401 01 Nameplate C 310400 01 Lamp Holder Set C 252013 01 LED Assembly C 250754 01 BOTTOM CASE A...

Page 5: ...r C D n N 00 en en C D 3 I i i J I __ I i I E...

Page 6: ...hat will be explained later shares the Processor Data Bus as a common data bus The Translated Address Bus Another C128 system bus is the Translated Address Bus which is produced by the MMU during AEC...

Page 7: ...Since VAO VA6 are actually multiplexed the row address only must be sent to the Shared Address Bus Thus the Multiplexed VIC addresses are transparently gated when either RAS or MUX are low but latche...

Page 8: ...ocessor and still keep throughput to a maximum The liD devices are not affected by the 2 MHz operation as they are still driven by a 1 MHz source and as such all timer operations remain unchanged and...

Page 9: ...te an interrupt sequence The pro cessor will complete execution of the current instruction before recognizing the request The Program Counter and the processor status register will be stored on the st...

Page 10: ...t must latch the data that was pre sent during AEC high Thus a transparent latch drives the data input to the 2 80 It is gated by the 2 80 Read Enable output and latched when the 1 MHz clock is low It...

Page 11: ...rocessors communicating between each other This is however only serial co processing not to be considered parallel co processing or mUltiprocessing Only one processor may have the bus at anyone time T...

Page 12: ...tput The 10RO signal indicates that the lower half of the address bus holds a valid ss for an 1 0 read or write operat An 10RO signal is also generated with an M 1 signal when an interrupt is being ac...

Page 13: ...RROM i ____ lL iExtensionli I Cd r d i i I C S80 _________________ _ 12 M J e 3R C I f Lc __ __ __ L _______ C128 ROM Memory Organization ceol 101 121 I b ceol_ _OROM C128 Memory Map rlHt 1 i 5 S K RR...

Page 14: ...hardware also features the ability to store preset values for the configuration and force a load of the Configuration Register by writing to one of the LCR Load Configuration Register registers C128 R...

Page 15: ...PXH register from affecting the translated address until both high and low bytes have been written At the same time the contents of the PO and P1 registers are applied to a digital comparator and a re...

Page 16: ...unctions remain as they were previously on the C64 with the exception that the MMU and the 80 Column chip have been added With the exception of four registers that are asserted in the zero page in C12...

Page 17: ...hand ROM is enabled in three memory areas in C128 mode each consisting of 16K of address space The lower ROM may be defined as RAM or System ROM the upper two ROMs may be System ROM Function ROM Cart...

Page 18: ...0 1 19 11 18 vee e53 A13 A8 A9 A11 C5 CE A1 C52 07 06 05 04 03 vee A14 A13 A8 A9 A11 C5 CE A1 e52 07 06 12 17 05 13 16 04 14 15 03 32K X 8 ROM 1 NC Not Connected 2 10 21 AO A 13 Address Bus Inputs 23...

Page 19: ...guration Register controls if and how much RAM is kept in common between banks and the Pointer registers redirect the zero and one pages to any page in memory overriding the effect of the two configur...

Page 20: ...ive VCC 8 9 A7 16 VSS Ground WE R W CLOCK 0 GENERATOR IR W SWITCH I t t t i i t RAS RAS CLOCK J DATA IN 0 W GENERATOR MEMORY 0 MEMORY BUFFER DIN ARRAY i ARRAY C CAS J ROW DEC cF ROW DEC V CAS CLOCK V...

Page 21: ...GEN I NO 1 pD t f CLOCK GEN NO 1 REF CONTROL CLOCK INTERNAL Al A6 ADDRESS COUNTER COLUMN V DECODER 0J SENSE AMPS 1 0 GATING l i I a w I Q a 0 LUw U I STORAGE CELL a u w Qu Q I ARRAY Q al I 0 a I AO A...

Page 22: ...ls for different processor modes C128 C64 Z 80 Generation of CAS select lines for RAM banking Generation of ROMBANK MSO MS 1 lines for ROM banking The MMU is the mechanism by which the various memory...

Page 23: ...om the memory map MMU registers FFOO to FF04 are always available in C128 mode The hardware line I OSE always reflects the polarity of this bit when in C128 mode In C64 mode the I OSE line the hardwar...

Page 24: ...egisters from FFOO to FF04 in any C128 mode configuration both CAS enable lines and both MS lines will be high Note that in C64 mode the bank used follows the same rules as in C128 mode though of cour...

Page 25: ...ssor is the Z 80 This is the reset configuration and will cause the Z 80 processor to be active and all accesses to memory to follow the Z 80 mapping rules In Z 80 mode any address to RAM bank 0 in th...

Page 26: ...U i t 0 11 Shore Status EXPRNSION VA16 VIC RRM 8 J R j J RAM Configuration Register The RAM Configuration Register The RAM Configuration Register sets up the RAM segmenting parameters for both the pro...

Page 27: ...and stack size limitations normally associated with 6502 family processors For zero page relocation the MMU provides the Page Zero Pointer High POHI and Page Zero Pointer Low POLl registers Bit 0 of...

Page 28: ...CNT COUNT INPUT RESET SYSTEM RESET COLORAM COLOR RAM CHIP SELECT ROM 1 4 ROM CHIP SELECTS FOR OPERATING SYSTEM 00 07 DATA BUS ROM H L CHIP SELECTS FOR EXPANSION ROMS DAO DA7 DISPLAY ADDRESS ROMBANK 00...

Page 29: ...OUT IN CONTROL C 9 OUT IN VSS 7 8 IN OUT 556 DUAL TIMER PIN ASSIGNMENTS DISCHARGE DISCHARGE 1 VCC THRESHOLD THRESHOLD 2 DISCHARGE CONTROL VOL TAGE CONTROL REseT 3 12 THRESHOLD VOL TAGE RESET 4 11 CON...

Page 30: ...D 12 i y B Y 11 13 7406 TRUTH TABLE INPUTS A B L L L H H L H H H HIGH voltage level L LOW voltage level OUTPUT Y H H H L TRUTH TABLE INPUTS A B L L L H H L H H H HIGH voltage level L LOW voltage level...

Page 31: ...LOGIC DIAGRAM A 1 3 2 A 4 6 s 12 11 13 HEX INVERTER SCHMITT TRIGGER PIN ASSIGNMENT LOGIC DIAGRAM 1 2 3 4 5 8 9 8 11 10 13 12 A L L H H TRUTH TABLE INPUT OUTPUT A Y H H L L H HIGH voltage level L LOW...

Page 32: ...vOltage level steady state h HIGH voltage level one setup lime pnor to the LOW la HIGH clock tranSition L LOW voltage level steady state I LOW voltage level one setup lime pnor to the lOW la HIGH clo...

Page 33: ...IC DIAGRAM Ob b Oc c Od 3 5 11 10 TRUTH TABLE INPUTS OUTPUT OEa la OEb Ib Va Vb L L L L L L L H L H H H H X H X Z Z H HIGH voltage level L LOW voltage level X Don t care Z HIGH impedance off state TRU...

Page 34: ...DIAGRAM 6l 001 Do 05 0 07 Vee 0 __ t ___ t ___ t ___ _ __ _ n I __ 1 r7 I i 12 I I li 1115 0 O a TRUTH TABLE INPUTS OPERATING MODES OE E Enable and read register L H L H Latch and read register L L L...

Page 35: ...ASSEMBLY LEV OUT THIS TIME PERIQQ i AIDS WILL BEr EVEI ATTENTION T PROXIMATELY TRANSITION INTO ER WARRANTY THROUGH LESHOOTING CHARTS AND INFORMATION RECEIVE SPECIAL AVAILABLE AP 1985 TO FACILITATE THE...

Page 36: ...f CJa a c a C 0 w n I n I LDJ _ _ _ _ _ J Illitt 0 Y I I UU g COMMO ORE 1 28 g U 00 I II n Q n n 50n t j N3 uu 1m u h rJ CNS gg g _ 11 n J I R hL CJCll c cu g ti 0 11 4 i i Dl1n WI C CI D Inu o 0 0 T...

Page 37: ...Generator 251527 01 R23 lOOK U29 30 7406 R24 47K U31 74LSOO R25 lOOK U32 ROM 1 C64 Kern Basic 251913 01 R26 100 R27 4 7K U33 ROM 2 BasIc 4000 318018 02 R28 10K U34 ROM 3 Basic 8000 318019 02 R29 30 68...

Page 38: ...50V 10 EMll 2 EMI Filter 47pF C74 Cer 10000pF EM13 6 EMI Filter 100pF C75 Cer 470pF 50V 10 EM19 11 EMI Filter 47pF C76 Cer 1uF EMI12 35 EMI Filter 100pF C77 Cer 10000pF 37 38 C78 C79 Cer 1000pF 50V 1...

Page 39: ...D ONl t u oH o ONL f 3 I i eN IU NjIJN lJ o 44 PH j FE LE OGE 2 _ c J P I LFt r illill 1 l s I r _ _ t f ___ Wf L C P 1 H r I C _ lA I AI 5 c SA7 c CIi i REV b 8 D I O CON cTO 1 0 Control Ports Keyboa...

Page 40: ...1 W f rf l M lll p P7 a I B ASS M1R P5 _r 11 ID ND lY v A fA Z 1 28 Ul 2 3A MAl ASS Sn SUP4 _ r T 1J O 1 040 __ _ CAS wRlJp I I lOr t I m lW Ae 2t tWf r Ut r J P7 I Il i J l 1 f Y Ubi 3 3 14136 C_ __...

Page 41: ...f J l 07 7 OlJVSS 1 OA7 00iII s J A 1 fJ mMAil 2t 7 6VF9 I R2 5 INto _ 5 U iii 11 D DAc I 03 4 t DJ AGo I 4 MAli I t g g Ul3 i t g uI5 l ___ J Lj nAcO D DO DA m 441 t ri 441 It I u W llll c 002 W m 2...

Page 42: ...3 l i 14l S 2 Gcl5I I 5V CAS GC SI I 1 TAI5 c l I DM r It 9 AS AI5 l BA R 1 a n o i4IT Irn Nt 1 1 41 4 A3 Ai AI 14 Ii It 3 u51 2 5V t5t RP9 IIO x9 1 2 IOto l 9 3 J I v v I Vv I 12 6 1 v 1 _13 VVV 14 A...

Page 43: ...I I Ti cor11 1 JORE CL t IJ J lri I I I I i I I n r e l PU In r r 1 2SZ J62 01 9 J JU7 dl I I I JW n i i i l n lJ p eN I 0J f Il I I I I I I N5 OUt u 14 JOlt I I 00 r ill _ a c I I I I I I I I I 1 I...

Page 44: ...R20 10K R21 470K R22 47K Jenerator 251527 03 R23 100K R24 47K R25 lOOK R26 100 Kern Basic 251913 01 R27 4 7K ic 4000 318018 02 R28 10K e 8000 318019 02 R29 30 68 lal COOO 318020 03 R31 100 lction Blan...

Page 45: ...F EMll 2 EMI Filter 47pF 470pF 50V 10 EM13 6 EMI Filter 100pF 11 F EM19 11 EMI Filter 47pF 011 F EMI12 35 EMI Filter 100pF 1000pF 50V 10 37 38 2 2I F 25V EMI39 EMI Filter 270pF 1000pF 50V 10 EM140 42...

Page 46: ...8 5V W Q w U zr U D D w Q CW c i 2 Z USN JV I 0 PI 0 1JKI I PI C c B A A 6 t 3 64...

Page 47: ...f iI M U ll ii 14 II N40 1 _ 12V T jIj HV Ilf I r svQ J7 I J I M ci t n i 7407 L1 eNI 5 91 s z 0 2 0 z 8 14 f ll QI l 02 1 L 80 od O l l6c i B 1 _____ _______ n l BlL VIT_ s g CNt2j f R MHA HI I 8 21...

Page 48: ..._ 11 1 I rj n 2 n j 07 c 1 12 I PESO c J n V 0 lJ5 US I S l I S 2 1 0 R2 k f I lIl q4 4 X i is 13 0 Q6 ZS CI815 cnfi l l A OK RS1RC 1 J 8 6 t 4 3 IJr5 PAC C ill D PHI I 1 MH c MH _ SA J Gf5 l D ti i...

Page 49: ...l 1 11I A S I 14LS 2 R29 B _ MQ an I MAl c 01 c I 8 7 5v 0 6 v 0 I l iwr 14 Iz C4 22 t J 4 12 o 5 t zV t Iz 4 Z f D T fT2 lj r li 3 3 TSV lip I Of 10 4 22 I 12 Q A8 2 hiV r IO fx 9 Q 14 12 C45 _2Z 5v...

Page 50: ...R18 M Cll 3 01 04 lSSl19 OR EQUIVALENT M 1 I 4 7k 10k I I 56p R14 C6 Q3 L I J 4 02 03 lSS198 OR EQUIVALENT AUDIO IN lk 2 2k _ a 0 0 0 5 COMPONENT PARTS VALUE R l C F L H n N N Co 0 0 N 0 ui U UT 0 T N...

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