GR716-DS-UM, May 2019, Version 1.29
454
www.cobham.com/gaisler
GR716
45.7
Redundancy
The SPI slave has a two SPI ports which can be interfaced using two different masters. The slave
takes two sets of SPI interfaces (nominal and redundant). The configuration registers available in the
device is used to enable which interface to communicate and it is possible to use dedicated commands
(using SPI 2 protocol) to activate and deactivate ports. While using configuration registers to activate
or deactivate ports, the complete control of activation and deactivation must be performed by the
external unit, only one port is active at any time. When commands are used to control the ports, the
device can receive commands from both the interfaces. By receiving from both the interfaces the
slave device can deactivate a non-working interface. The intention is to keep only one bus active for
normal operation but using the redundant bus to achieve switchover. The SPI protocol 2 implementa-
tion supports dedicated commands to achieve the activation and deactivation of interfaces.
10
ILLEGAL_CMD
Error ’0’ = no fault
‘1’ = fault
This bit flag that the
previous received
command was not
compatible with the
SPI slave device.
Always related to
the previous com-
mand. Reception of
a valid command
will clear it (with a
delay of one com-
mand)
When the prefix and
spare bits in the
received command
token do not match
the intended value
or an unimple-
mented command is
received this status
bit is enabled. The
next valid com-
mand clears this sta-
tus bit
Table 609.
Response Module State bits
Bit
Description
3
In the SPI slave device these bits are enabled or disabled by SPI2 control register (MODSTAT)
using APB. These bits can be used by Software controlling the slave device to provide addi-
tional status to the master.
2
1
0
Table 608.
Response Status bit
Bit
Identifier
Type
Value
Description
Clear Condition
Comment