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CMS80F731x Reference Manual
4.3
System Clock Switching
A set of crystal ports on the chip can only have one set of crystal ports valid at the same time, so it is forbidden to use the
switching function of HSE/LSE. When the current chip selects an external HSE clock, the use of LSE-related functions is Disable.
When the current chip selects an external LSE clock, the use of HSE-related functions is Disable. If the user misoperates, the
register SCKSTAU[4] error configuration status bit will be set to 1, and the user will need to change the code or configuration
after judging the position of the error flag.
The system clock switching steps are shown in the following figure:
Chip Power On
Chip
configuration
completes
Clock source
selection
Clock stability
assessment
Clock
configuration
selection
clock switch
enable
wait till switch
completes
Start
finish
whether switch clock
again
Yes
No
wait for 6 NOPs
write SCKSEL[3]=1, this bit will be
auto-clear to 0 after written 1.
read SCKSTAU[7:4] clock stability
status bit
write SCKSEL[2:0] to select system
clock source
Write SCKSEL[4]=1
Fsys is determined by config
Configuration
Yes
No
否
SCKSEL[4]=1
Yes
SCKSEL[4]=0
whether clock source
configuration is referring
to CONFIG
Note: When switching the system clock source, ensure that the corresponding clock source exists and is configured correctly.
