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CMS80F731x Reference Manual
17.
PWM Module
17.1 Overview
The PWM module supports six PWM generators, which can be configured as 6 independent PWM outputs (PG0-PG5), or
as 3 sets of synchronous PWM outputs, or 3 pairs of complementary PWM outputs with programmable dead-zone generators,
where PG0-PG1, PG2-PG3, and PG4-PG5 are paired.
Each PWM has its own 16-bit cycle register, a 16-bit duty cycle register (comparison data register) to configure the cycle
of the PWM output and adjust the duty cycle. Each PWM has its own clock-divider control registers, and each pair of PWMs
shares an 8-bit prescale control register.
Each PWM can be configured in edge alignment counting mode. Each PWM can be set in single mode (generating a
PWM signal cycle) or autoloaded (continuous output PWM waveform) outputs, and its output polarity can also be set via the
output polarity controller.
PWM supports interrupt functionality. The 6-way PWM generator provides a total of 12 interrupt flags, including a zero
interrupt, a down-and-down comparison interrupt, which shares a single interrupt vector entry.
17.2 Characteristic
The PWM module has the following features:
◆
6 independent 16-bit PWM control modes.
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6 independent outputs: PG0, PG1, PG2, PG3, PG4, PG5;
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3 sets of complementary PWM pair outputs: (PG0-PG1), (PG2-PG3), (PG4-PG5), programmable dead-zone
can be inserted;
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3 sets of synchronous PWM pair outputs: (PG0-PG1), (PG2-PG3), (PG4-PG5), each set of PWM pair pin
synchronization.
◆
Support group control, PG0, PG2, PG4 output synchronization, PG1, PG3, PG5 output synchronization.
◆
Edge alignment mode is supported.
◆
Support single-shot mode or auto-load mode.
◆
Each PWM has independent polarity control.
◆
The PWM edge triggers the initiation of AD conversion.
17.3 Port Configuration
Before using the PWM module, you need to configure the corresponding port as a PWM channel, and the PWM channel is
marked with PG0~PG5 on the multiplexing function allocation table, corresponding to PWM channel 0~5.
The allocation of PWM channels is controlled by the corresponding port configuration registers, for example:
P00CFG=0x05; Configure the P00 as a PG0 channel
P01CFG=0x05; Configure P01 as PG1 channel
P02CFG=0x05; Configure P02 as a PG2 channel
P03CFG=0x05; Configure the P03 as a PG3 channel
P04CFG=0x05; Configure the P04 as a PG4 channel
P05CFG=0x05; Configure the P05 as a PG5 channel