AN201
Rev 1.5 | 56/91
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5 System Clock Source
/SLEEP
System Clock
111
110
101
100
011
010
001
000
P
re
s
c
a
le
r
16MHz
8MHz
4MHz
2MHz
1MHz
500K
INTOSC
32768Hz
OSC2
OSC1
C2=12pF
C1=12pF
16MHz
Internal
OSC
256KHz
Internal
OSC
/8
0
1
LFMOD
T
IM
E
R
2
Power-up timer(PWT)
Watchdog timer(WDT)
Fail safe clock monitor(FSCM)
IRCF<2:0>
(OSCCON)
XT
OSC
FOSC<2:0> Configuration
SCS<0> OSCCON
Register
Figure 13
.
System Clock Source Diagram
The chip contains 3 clock sources: 2 built-in oscillators used as various clock sources, and 1 external clock input source. The
built-in oscillator includes 1 internal 16 M high-frequency precise oscillator (HFINTOSC), and 1 internal 32 k/256 k low-frequency
and low-power oscillator (LFINTOSC). These clocks or oscillators, combined with prescalers, can provide the system with a
variety of frequency clock sources. The prescaler ratio of the system clock source can be controlled by the IRCF<2:0> bit in the
OPTION register.
Notes:
1.
The watchdog, system clock source (IRCF=000) and PWRT all use the output of frequency division by 8, that is 32 k Hz,
regardless of the LFMOD value.
5.1 Clock Source Mode
The clock source mode includes the external mode and the internal mode.
The external clock mode gets clock sources from external circuits such as the EC mode of external clocks, the XT and LP
mode of crystal resonators.
The internal clock mode is built in the oscillator module. The oscillator module has a 16 MHz high frequency oscillator and a
32 kHz low frequency oscillator.
Internal or external clock sources can be selected by the system clock selection bit(SCS) of the OSCCON register.
