CMOSTEK CMT2380F17, Manual

Page: 103 / 347

CMT2380F17
Rev0.1 | 103/347
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PDRVC1
：
Port Drive Control Register 1
SFR Page = 3 only
SFR Address = 0xB4
Bit 7 6 5 4 3 2 1 0
Name -- -- -- -- -- -- P4DC1 --
R/W W W W W W W R/W R/W
Reset Value X X X 0 X X 0 0
Bit 7~2: Reserved. Software must write “0” on these bits when PDRVC1 is written.
Bit 1: P4DC1, Port 4 output driving strength control on high nibble.
0: Select the P4.6 ~ P4.4 output with high driving strength.
1: Select the P4.6 ~ P4.4 output with low driving strength.
。
Bit 0: reserved bit. When writing the PDRVC1 register, the software bit must write to "0".
14.2.7 Port Output Fast Driving Control Register
In CMT2380F17, all port pins have two driving speed selection by software configured except P4.7.
Please refer to get the driving strength information on the port pins.
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P3FDC
：
Port 3 Fast Driving Control Register
SFR Page = 7 only
SFR Address = 0x92
Bit 7 6 5 4 3 2 1 0
Name -- -- P3FDC.5 P3FDC.4 P3FDC.3 -- P3FDC.1 P3FDC.0
R/W W W R/W R/W R/W W R/W R/W
Reset Value 0 0 0 0 0 0 0 0
Bit 7~0: Port 3 output fast driving control could be only set/cleared by CPU. 0: Disable fast driving on port
pin output.
1: Enable fast driving on port pin output.