CMT2380F17
Rev0.1 | 100/347
www.cmostek.com
AUXR11
：
Auxiliary Register 11
SFR Page
= 8 only
SFR Address = 0xA4
Bit
7
6
5
4
3
2
1
0
Name
P30AM
--
--
--
--
--
C0M0
C0OFS
R/W
W
W
W
W
W
W
R/W
R/W
Reset Value
0
0
0
0
0
0
0
0
Bit 7: P30AM, P3.0 Analog input Mode enable.
0: The P3.0 GPIO mode is controlled by P3M0 and P3M1.
1: Force P3.0 to be analog input mode for the AIN4 input of ADC12.
14.2.4
Port 4 Register
P4
：
Port 4 Mode Register 0
SFR Page
= 0 only
SFR Address = 0xB3
Bit
7
6
5
4
3
2
1
0
Name
P4.7
--
P4.5
P4.4
--
--
--
--
R/W
R/W
W
R/W
R/W
W
W
W
W
Reset Value
1
X
1
1
X
X
1
1
Bit 7~0: Port 4 output data latch could be set/cleared by CPU.
P4.5 and P4.4 have the alternated function for OCD_SDA and OCD_SCL. Due to MG82F6D17AS8
SOP8 not support OCD_ICE, it needs to disable OCD_SDA and OCD_SCL by firmware when using
MG82F6D17AS8 SOP8.
P4.7 has the alternated function for RST input.
P4M0
：
Port 4 Mode Register 0
SFR Page
= 0 only
SFR Address = 0xB3
Bit
7
6
5
4
3
2
1
0
Name
P4M0.7
--
P4M0.5
P4M0.4
--
--
--
--
R/W
R/W
W
R/W
R/W
W
W
W
W
Reset Value
1
0
1
1
0
0
0
0
Note: When P4.7/RST use as port pin, it is not suggest to program it as Input to avoid MCU is locked in reset
in bootup period when level high send into this pin.
Summary of Contents for CMT2380F17
Page 27: ...CMT2380F17 Rev0 1 27 347 www cmostek com 1 25 Phase Noise...
Page 177: ...CMT2380F17 Rev0 1 177 347 www cmostek com Figure 17 3 PCA Interrupt System...
Page 246: ...CMT2380F17 Rev0 1 246 347 www cmostek com SnMIPS S0MI S1MI 1 P3 3 P4 7...
