Clevo PB70RC, Service Manual

Page: 62 / 140

Sheet 13 of 91
PS8330B
Schematic Diagrams
B - 14 PS8330B
B.Schematic Diagrams
PS8330B
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
DESIGN NOTE:PEQ
Programmalbe input equalization levels;internal pull
down at~150k ,3.3v I/O
L: default, LEQ, compensate channel loss up to 12dB at
HBR2
H: HEQ, compensate channel loss up to 15dB at HBR2
M:LLEQ, compensate channel loss up to 5dB at HBR2
DESIGN NOTE:CFG0
Configuration pin for automatic EQ and
Aux interception; Internal pull down at
~150Kohm,3.3V I/O
L: default, automatic EQ enable and Aux interception enable
H: automatic EQ disable and AUX interception enable
M: automatic EQ disable and AUX interception
disable,no pre-emphasis, 600mVpp swing
DESIGN NOTE:CFG1
Configuration pin for auto test and input offset
cancellation,3.3V IO, internal pull up at~150K
H: default, auto test disable and input offset cancellation
enable
L: auto test enable and input offset cancellation enable
M: auto test disable and input offset cancellation disable
From NV Port_A
From NV Port_A
From TBT
To TBT
PDB PIN:
L:Chip power down
H:Normal operation(default)
close PS8330B
To TBT
mDP REDRIVER
20180413 del resistors
co-lay with IC pin
To NV Port_A
20180420
Del co-lay circuit
20180420
Del co-lay circuit
20180420
Del co-lay circuit 20180420
Del co-lay circuit
DIFF=90ohm, Total L<6" DIFF=100ohm, L<2"
DIFF=100ohm, L<2"
DIFF=90ohm, Total L<6"
20180430 Del PS8338B
20180430 Del PS8338B
20180430 Del PS8338B
MLCC Comm part
D02 1012
use non-dongle Cable, TBT no display
PS8330B_AUXn
PS8330B_AUXp
PS8330B_CFG0
PS8330B_CFG1
CEXT
PS8330B_PEQ
PS8330_REXT
IN0P_R
IN0N_R
IN1N_R
IN1P_R
IN2N_R
IN2P_R
IN3N_R
IN3P_R
3.3VS
3.3VS
3.3VS
3.3VS
3.3VS 3.3VS 3.3VS
3.3VS
3.3VS
3.3VS 8,9,10,11,12,14,29,34,35,37,38,39,40,43,44,46,47,53,54,55,56,57,60,63,64,70,71,77
PS8330B_HPD 59
PS8330B_D3N 59
PS8330B_D3P 59
PS8330B_D2N 59
PS8330B_D2P 59
PS8330B_D1N 59
PS8330B_D1P 59
PS8330B_D0N 59
PS8330B_AUXn_SDA 59
PS8330B_D0P 59
PS8330B_AUXp_SCL 59
MDP_A0 27
MDP_A2 27
MDP_A#1 27
MDP_A1 27
MDP_A#0 27
MDP_A#3 27
MDP_A3 27
MDP_A#2 27
MDP_A_AUX#_SDA 27
MDP_A_AUX_SCL 27
MDP_A_TBT_HPD 34,39
Title
Size Document Number R e v
Date: Sheet o f
6-71-PB500-D03
D03
[13] 04-4-2 DP REPEATER PS8330B
A3
13 91 Friday, December 07, 2018
ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/
PB50EF
Title
Size Document Number R e v
Date: Sheet o f
6-71-PB500-D03
D03
[13] 04-4-2 DP REPEATER PS8330B
A3
13 91 Friday, December 07, 2018
ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/
PB50EF
Title
Size Document Number R e v
Date: Sheet o f
6-71-PB500-D03
D03
[13] 04-4-2 DP REPEATER PS8330B
A3
13 91 Friday, December 07, 2018
ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/
PB50EF
R321 *4.7K_04 TBT
C1083 0.1u_10V_X7R_04 TBT
C1035 0.1u_10V_X7R_04 TBT
R320 *4.7K_04 TBT
R274
100K_04
TBT
C1032
0.1u_6.3V_X5R_02
TBT
R322 *4.7K_04 TBT
C1106
0.01u_16V_X7R_04
TBT
C1067 0.1u_10V_X7R_04 TBT
R892 0_04 TBT
C1049 0.1u_10V_X7R_04 TBT
R727 *4.7K_04 TBT
C1059 0.1u_10V_X7R_04 TBT
R722 *4.7K_04 TBT
R893 0_04 TBT
R324 4.99K_1%_04 TBT
R325
1M_04
TBT
C1033
2.2u_6.3V_X5R_04
TBT
C1034 0.1u_10V_X7R_04 TBT
C1094 0.1u_10V_X7R_04 TBT
R323 *4.7K_04 TBT
C1054 0.1u_10V_X7R_04 TBT
C1090 0.1u_10V_X7R_04 TBT
R273 10K_04 TBT
C1105 2.2u_6.3V_X5R_04
TBT
C1072 0.1u_10V_X7R_04 TBT
R275
100K_04
TBT
PS8330B
U19
PS8330B
TBT
VDD3
3
1
CEXT
2
I2
C_
ADD
R
3
S
C
L_
C
T
LP
E
Q
4
SDA
_
CL
T
C
F
G
0
5
VDD3
3
6
REXT
7
CAD_
SRC
8
HPD_
SRC
9
CAD_
SNK
10
HPD_
SNK
11
VDD3
3
12
OUT3n
13
OUT3p
14
NC
15
OUT2n
16
OOUT2p
17
GND
18
OUT1n
19
OUT1p
20
NC
21
OUT0n
22
OUT0p
23
GND
24
VDD3
3
36
RST
#
35
SD
A_
DDC
34
SC
L
_
DDC
33
VDD3
3
32
GN
D
31
A
U
X_
SR
Cp
30
A
U
X_
SR
Cn
29
AU
X_
SN
Kp
28
AU
X_
SN
Kn
27
PD
#
26
VDD3
3
25
IN3n
48
IN3p
47
NC
46
IN2n
45
IN2p
44
NC
43
IN1n
42
IN1p
41
CFG1
40
IN0n
39
IN0p
38
NC
37
EPAD
49