Clevo M770SU, Service Manual

Page: 85 / 108

Schematic Diagrams
SATA HDD, PWR, LID B - 31
B.Schematic Diagrams
SATA HDD, PWR, LID
Sheet 30 of 48
SATA HDD, PWR,
LID
3 . 3V 2, 1 2 , 19 , 2 0, 2 2 , 2 3, 2 4 , 26 , 3 2 , 33 , 3 8, 3 9 , 40
U 2 5 A
7 4L V C 0 8 P W
1
2
3
14
7
PO WE R GO OD & RE SE T
S B _ P C I R S T # 1 2 , 2 1
C 7 2 6
*. 0 1 U _ 16 V _ X 7R _0 4
S3AUXSW#
L I D _ S W # 2 0, 2 7
Z 2 9 1 2
R 2 94
*1 0K _ 0 4
3. 3 V
M_ B TN # 4 0
R 1 1 0 K _ 04
0
R 2 8 2
*1 0 K _ 04
R 3 3 8 33 _ 0 4
U 2 5 C
7 4L V C 0 8 P W
9
1 0
8
14
7
J_ S W 1
8 52 0 1-0 4 0 51 _ R
1
2
3
4
R 2 73 *1 0 m il _ sh o rt
1. 5 V _ P W R G D 3 9
1
Z 2 9 01
M_ B T N #
R 3 3 5 33 _ 0 4
J_SW1
1
3 . 3V
U 2 5 D
7 4L V C 0 8 P W
1 2
1 3
1 1
14
7
K B C _ S U S B # 2 7
C 74 0 . 0 1 U _ 16 V _ X 7R _0 4
U 1 9
*7 4 A H C 1G 08 GW
1
2
5
4
3
S ATA H DD
C 4 30
* . 1 U _ 16 V _ 04
5 V S
Q1 3
*2 N 7 0 02 W
G
D
S
S4/S5
POWER SWITCH CONNECTER
1. 8 V _ P W R G D 4 0
D E L A Y _ P W R G D 6 , 3 7
1
C 74 2 . 0 1 U _ 16 V _ X 7R _0 4
SIS ? ? ? ?
? ? ? ? ?
Con ne cto r
P S ON # 2 2
S A TA R XP 0 2 3
P C I _ R S T # 28 , 3 2 , 33
N B _ R S T # 6, 1 1
Z 2 9 08
PSU1, PSU2
C 4 1 5
*. 1 U _ 1 6V _ 0 4
0
3. 3V
P I N GN D 1 ~ 2 = G N D
5 V S 1 9, 2 0 , 29 , 3 0, 32 , 3 4, 3 5
C 6 99
1 U _1 0 V _0 6
S B _ P W R OK 2 0, 2 2
LID SWITCH IC
C 4 2 0
. 1 U _ 10 V _ X 7R _0 4
LP C _ R S T # 2 7 , 3 3
S0/S1
S A T A R X N 0 _ R
3 D0 3A
1
3 . 3V S 6, 1 0 , 11 , 1 9 , 20 , 2 1, 2 2 , 23 , 2 4 , 25 , 2 7, 2 8 , 2 9, 3 0 , 32 , 3 3, 3 4 , 3 5, 3 7
Z 2 9 03
S A TA T X P 0 2 3
+
C 7 09
10 0 U _ 6. 3 V _ B 2
C 50 7 * . 1U _1 0 V _ X7 R _ 0 4
C 7 2 7
*1 0 U _ 10 V _ 08
Q1 5
*2 N 7 00 2 W
G
D
S
R 34 2
1 0 0K _ 0 4
P OWE R MA NA GME NT
2
3. 3 V
S A T A T XN 0_ R
R 3 67
10 K _ 0 4
R 2 7 6
*4 . 7 K _0 4
R 2 7 2
*4 . 7 K _0 4
1
D03 A
Q1 4
*2 N 7 0 02 W
G
D
S
C 4 2 1
. 1 U _ 10 V _ X 7R _0 4
4
Z 2 9 04
R 3 3 0 33 _ 0 4
3 . 3V
S3
Z 2 91 0
R 2 7 7
1 0 0K _ 0 4
R 2 75 *1 0 m il _ sh o rt
3 . 3V
N B _ S 3 A U X S W # 5
S A TA T X N 0 23
R 2 79 *1 0 m il _ sh o rt
Z 29 0 5
Z 2 9 02
Z 2 90 7
C 7 1 1
1 0U _1 0 V _0 8
1 . 0 5 V S _P W R GD 3 9
S U S B # 1 2, 25 , 2 8, 3 3 , 35 , 3 9 , 40
L I D _ S W #
VCORE Power Good delay
3ms and Notice SB
D03 A
3 . 3V
3. 3 V
C 4 0 9
*. 1 U _1 6 V _0 4
R 2 8 0
*1 00 K _ 0 4
J_ H D D 1
9 1 90 7 -02 2 0 C
S 1
S 2
S 3
S 4
S 5
S 6
S 7
P 1
P 2
P 3
P 4
P 5
P 6
P 7
P 8
P 9
P 1 0
P 1 1
P 1 2
P 1 3
P 1 4
P 1 5
C 7 10
. 1 U _1 0 V _X 7 R _ 0 4
D03 A
S A T A T XP 0 _ R
Q 26
*D TC 11 4 E U A
C
E
B
3 . 3V S
S A TA R XN 0 2 3
If ne ed PSO N#
th an use d 1 00 K
an d 0 .1U
K B C _ S U S C # 27
Z 2 9 1 1
Z 2 9 13
PSON#
For NB control and Level shift
All Power Good and
Notice SB
S B _ S U S C # 2 2
S B _ S U S B # 2 2
SIGNAL
Close to SIS968
D0 3A
C 73 5 . 0 1 U _ 16 V _ X 7R _0 4
1
R 4 8 9
*0 _ 04
Z 2 9 0 6
C 1
. 1U _1 0 V _ X7 R _ 0 4
C 73 7 . 0 1 U _ 16 V _ X 7R _0 4
3 . 3 V 3. 3V
S A T A R X P 0 _R
U 1
MH -2 4 8
1 2
3
V C C O U T
GN
D
3. 3 V S
Z 2 90 9
U 2 5 B
7 4L V C 0 8 P W
4
5
6
14
7