30
DS792DB1
CDB43L22
-100
+0
-95
-90
-85
-80
-75
-70
-65
-60
-55
-50
-45
-40
-35
-30
-25
-20
-15
-10
-5
d
B
r
A
20
20k
50
100
200
500
1k
2k
5k
10k
Hz
-140
+0
-130
-120
-110
-100
-90
-80
-70
-60
-50
-40
-30
-20
-10
d
B
r
A
20
20k
50
100
200
500
1k
2k
5k
10k
Hz
Figure 25. FFT - S/PDIF In to Speaker Out @ 0 dBFS
Figure 26. FFT - S/PDIF In to Speaker Out @ -60 dBFS
-5
+5
-4.5
-4
-3.5
-3
-2.5
-2
-1.5
-1
-0.5
-0
+0.5
+1
+1.5
+2
+2.5
+3
+3.5
+4
+4.5
d
B
r
A
20
20k
50
100
200
500
1k
2k
5k
10k
Hz
0.01
10
0.02
0.05
0.1
0.2
0.5
1
2
5
%
20
20k
50
100
200
500
1k
2k
5k
10k
Hz
Figure 27. Frequency Response - S/PDIF In to Speaker Out
Figure 28. THD+N - S/PDIF In to Speaker Out
0.01
10
0.02
0.05
0.1
0.2
0.5
1
2
5
%
200m
1.2
400m
600m
800m
1
W
V
P
= 3.7 V
0.01
10
0.02
0.05
0.1
0.2
0.5
1
2
5
%
0
2
200m
400m
600m
800m
1
1.2
1.4
1.6
1.8
W
V
P
= 3.7 V
V
P
= 5.0 V
Figure 29. THD+N vs. Output Power (Stereo)
Figure 30. THD+N vs. Output Power (Mono)
V
P
= 2.5 V
V
P
= 5.0 V
V
P
= 2.5 V
Summary of Contents for CDB43L22
Page 20: ...20 DS792DB1 CDB43L22 8 CDB43L22 SCHEMATICS Figure 10 CS43L22 Analog I O Schematic Sheet 1 ...
Page 21: ...DS792DB1 21 CDB43L22 Figure 11 S PDIF Digital Interface Schematic Sheet 2 ...
Page 22: ...22 DS792DB1 CDB43L22 Figure 12 Micro FPGA Control Schematic Sheet 3 ...
Page 23: ...DS792DB1 23 CDB43L22 Figure 13 Power Schematic Sheet 4 ...
Page 24: ...24 DS792DB1 CDB43L22 9 CDB43L22 LAYOUT Figure 14 Silk Screen CDB43L22 CS43L22 ...
Page 25: ...DS792DB1 25 CDB43L22 Figure 15 Top Side Layer ...
Page 26: ...26 DS792DB1 CDB43L22 Figure 16 GND Layer 2 ...
Page 27: ...DS792DB1 27 CDB43L22 Figure 17 Power Layer 3 ...
Page 28: ...28 DS792DB1 CDB43L22 Figure 18 Bottom Side Layer ...