Ceyear 1465 Series, Programming Manual

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2 Remote Control
2.1 Remote control basis
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(SCPI definition), they contain the specific operating information of the instrument. All SCPI
status registers have
the same internal structure (refer to ―Section 2.1.5.2 Structure of SCPI
Status Register‖ in this Programming Manual for details)
3) IST, PPE
Similar to the SRQ, an individual bit of the IST mark ("Individual STatus") is a combination of all
statuses of the instrument. The associated parallel query enable register (PPE) determines which
data bits of the STB act on the IST mark.
4) Output buffer
The outpu
t buffer stores the message returned by the instrument to the controller. It doesn‘t belong
to the status reporting system but determines the value of the MAV bit of STB.
For detailed description of the above register, refer to ―Section 2.1.5 Status Reporting System‖ in this
Programming Manual.
SRE, ESE
The SRE can be used as an enable part of the STB. Similarly, the ESE can be used as an enable part of
the ESR.
2.1.5.2 Structure of SCPI Status Register
Each standard SCPI register contains five parts. Each part contains 16 data bits and is functionally
independent. For example: Each hardware status is allocated with a data bit that is effective for all the
five parts of the register. If the Bit15 is set to 0, it means that the value of the register is a positive integer.
Fig. 2.4 Structure of Status Register
The above Figure shows that the status register is composed of 5 parts, which are described as follows:

Condition register
This part will be directly written by hardware or low-level register digit, which will reflect the current
working state of the instrument. This register is read-only and cannot be written. Reading will not clear
any value.
NOTE