C&H M 2 2 0, User Manual, Page: 22 / 30

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3. The Row n Set/Reset readback registers return the programmed relay state only if you
use the module correctly. Since the driver power can be disabled (the power-on state),
the
Row n Set and Row n Reset registers can be written to and read from without
moving any relay contacts.
4. When the module loses power, any closed relays remain closed (latching relays). When
power is restored, the relays remain closed but the Row n Set and Row n Reset registers
have lost their relay state information. This relay information is lost whenever power is
cycled or the carrier asserts /RESET. You must initialize the module after a power-up
or /RESET to achieve correlation between the Row n Set/Reset readback registers and
the actual relay positions. To initialize the module:
a. Enable driver power.
b. Write all four column bits to zero in each Row n Reset register.
You can check for initialization by reading the Init Status bit. If the module has not been
initialized since the last power-up or /RESET, the Init Status bit will be logic “0”. The Init Status
bit is set to logic “1” whenever the module has been successfully initialized.
1. To guarantee break-before-make relay operation, write to the Row n Reset registers
before writing to the Row n Set registers.
2. It is important to use the FIFO status bits when writing to the Row n Set/Reset
registers, especially when writing in bursts (such as when resetting the module’s relays).
Writing to a Row n Set/Reset register when the FIFO is full results in the loss of data
since the FIFO has no room to hold it. You should always check the FIFO FULL status
to ensure that FIFO is not full before writing to a Row n Set/Reset register.
4.3
MATRIX DRIVE TO CHANNEL MAPPINGS
Table IV correlates the matrix drive rows and columns to channel numbers on the M220.
Table IV. Matrix Drive
Matrix Drive Column 0 Column 1 Column 2 Column 3
Multiplexer A
Row 0
Row 1
Channel 0
Channel 4 Channel 1
Channel 5 Channel 2
Channel 6 Channel 3
Channel 7
Multiplexer B
Row 2
Row 3
Channel 8
Channel 12
Channel 9
Channel 13
Channel 10
Channel 14 Channel 11
Channel 15
4.4 INTERRUPTS
Module interrupts are enabled by setting the INTE bit in the Control register; however, routing of
the m-module interrupt request to your system is dependent on the m-module carrier and the
system interface. Refer to user manuals for those devices for details.
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