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Cambricon MLU-X1001, Product Manual

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Cambricon ®

Copyright © 2020 Cambricon Corporation

7

4. Component Profile

4.1 MLUX-BB 1

MLUX-BB 1 is the baseboard which carries MLU290-M5 Intelligent processing card. Each MLUX-BB

1 can carry 4 MLU290-M5 intelligent accelerating cards. The details are shown in the following figure:

Figure 4.1 MLUX -BB1 graphic

Table 4.1 MLUX -BB1 Description

Serial

Note

Serial

Note

Summary of Contents for MLU-X1001

Page 1: ...MLU X1001 Accelerator Product Manual V0 9 3 2020 10 30 ...

Page 2: ...ew of structural specifications 4 3 3 Overview of electrical specifications 5 3 4 Summary of heat dissipation specifications 6 4 Component Profile 7 4 1 MLUX BB 1 7 4 2 MLUX PA4 9 4 3 MLUX PDB 9 4 4 MLUX LINKB 10 4 5 MLUX IBB 10 4 6 Front panel 11 4 7 Back panel 12 5 Electrical specifications 13 5 1 PCIE topology description 13 5 2 MLU LINK interface description 14 5 3 Power Interface Description ...

Page 3: ...on specifications 19 7 1 Description of the heat dissipation environment 19 7 2 Wind resistance curve of MLU X1001 20 8 Optional components 21 8 1 PCIE High Speed Cable 21 8 2 MLU LINK High Speed Cable 21 8 3 Network 21 8 4 Hard disk 22 9 Cambricon NeuWare development environment 23 10 Compliance 24 ...

Page 4: ...to the customer for the products described in this Guide shall be limited Accuracy of information The information provided in this document is owned by Cambricon and Cambricon reserves the right to make any changes to this document information or to any products and services without notice The information contained in this guide and all other information of the Cambricon documents cited in this gu...

Page 5: ...eworked modified published uploaded published transmitted or distributed in any way without the prior written permission of Cambricon Except for the customer s right to use this guide information and products according to this guide Cambricon does not grant any other express or implied rights or permits It is doubtful that the Cambricon does not grant any express or implied rights or permits to th...

Page 6: ...290 M5 intelligent accelerating cards and provides up to 2 POPs of adaptive precision computing power The supercomputing system from 4 cards to 16 cards is constructed by using the Cambrian MLU LINK inter chip direct connection technology which provides a highly agile highly reliable and high performance computing foundation for the Artificial Intelligence Computing Center ...

Page 7: ... Calculation accuracy support INT16 INT8 INT4 FP32 FP16 Video decoding Support Memory capacity 192GB ECC protection Yes System interface 2 PCI Express 4 0x16 MLU LINK external interface 8Ports MLU LINK interface bandwidth 8 100 GB S TDP power consumption 2300W Heat dissipation scheme Air cooled compatible with liquid cooled 3 2Overview of structural specifications The structure specifications of t...

Page 8: ...ending radius L2 Base on the chassis 30 AWG 97 45 mm 78 5 mm 26 AWG 121 64 mm 102 7 mm Figure 3 1 Bending radius of cable 3 3Overview of electrical specifications MLU X1001 accelerator electrical specifications as follows Table 3 4 Electrical Specification for MLU X1001 Specification indicators Note System interface PCIE Gen 4X 16 Number of PCIE ports 2Ports PCIE bandwidth 128GB s Number of MLU LI...

Page 9: ...tion specifications The heat dissipation specification of MLU X1001 accelerator is as follows Table 3 4 Heat dissipation specifications of MLU X1001 Specification indicators Note Working temperature 0 35 altitude of 900m below Working humidity 20 RH 85 RH Storage temperature 40 75 Storage humidity 5 RH 95 RH Noise SDP 23 sound power 7 2 bels Working altitude 3000 m 900 3000m for each increase of 3...

Page 10: ...B 1 MLUX BB 1 is the baseboard which carries MLU290 M5 Intelligent processing card Each MLUX BB 1 can carry 4 MLU290 M5 intelligent accelerating cards The details are shown in the following figure Figure 4 1 MLUX BB1 graphic Table 4 1 MLUX BB1 Description Serial Note Serial Note ...

Page 11: ...3 MLU LINK 1A 1B 18 OAM MODULE 3 4 MLU LINK 1A 1B 19 F AN 4 5 PCIE 0 20 F AN 3 6 PCIE 1 21 F AN 2 7 IPMI 22 F AN 1 8 UID 23 F AN 0 9 COM HUB0 24 PCIE SWITCH 0 10 COM HUB1 25 PCIE SWITCH 1 11 COM HUB2 26 54V POWER BUSBAR 12 AC INDICATOR 27 HANDLE 0 13 FRONT PANEL CONN 28 HANDLE 1 14 PDB MGT CONN 29 FRONT PCIE CONN 15 OAM MODULE 0 ...

Page 12: ... details are shown in the following figure Figure 4 2 MLUX PA4 graphic Table 4 2 MLUX PA4 Description Serial number Note Serial number Note 1 mini SAS HD CONN 3 PCIE GOLDEN FINGER 2 PCIE RETIMER 4 3MLUX PDB MLUX PDB is the power distribution board The details are shown in the following figure Figure 4 3 MLUX PDB graphic Table 4 3 MLUX PDB Description Serial number Note Serial number Note ...

Page 13: ...nnection board The details are shown in the following figure Figure 4 4 MLUX LINK B graphic Table 4 4 MLUX PDB Description Serial number Note Serial number Note 1 SSD MGT CONN 0 5 OCULINK 2 2 SSD MGT CONN 1 6 OCULINK 3 3 OCULINK 0 7 IBB CONN 4 OCULINK 1 8 FRONT PCIE CONN 4 5MLUX IBB MLUX IBB is the backplane of Infiniband card Each MLUX IBB can place two Infiniband cards The details are shown in t...

Page 14: ...l number Note 1 IBB CONN 3 IB SLOT 1 2 IB SLOT 0 4 6Front panel The front panel of the chassis is shown as follows Figure 4 6 Front panel of chassis Table 4 6 Description of front panel of chassis Serial number Note Serial number Note 1 Switching keys 7 SSD 1 2 UID keys 8 SSD 2 3 Reset button 9 SSD 3 4 PSU 0 10 NIC 0 5 PSU 1 11 NIC 1 ...

Page 15: ...ar panel of chassis Table 4 7 Description of rear panel of chassis Serial number Note Serial number Note 1 PCIE 0 10 MLU LINK 3B 2 PCIE 1 11 IPMI 3 MLU LINK 0A 12 UID 4 MLU LINK 0B 13 COM HUB 0 5 MLU LINK 2A 14 COM HUB 1 6 MLU LINK 2B 15 COM HUB 2 7 MLU LINK 1A 16 AC INDICATOR 8 MLU LINK 1B 17 POWER CORD 0 9 MLU LINK 3A 18 POWER CORD 1 ...

Page 16: ...er and there are 2 PCIE switching chips to connect the PCIE devices inside PCIE interconnection topology is shown as follows Figure 5 1 PCIE Connection topology PCIE signal rate is 16 Gbps and the cable loss is controlled within 15 dB 8GHz It is recommended to use 1 meter cable with a diameter of 30 AWG The pins of the miniSAS HD connectors used by PCIE interfaces are defined as follows ...

Page 17: ...3 V SMDAT SMBUS interface data signal 4 7 KΩ pull up to 3 3 V PERST Reset signal REFCL K P N PCIE clock signal PRESENT Opposite side in position detection signal 4 7 KΩ pull up to 3 3 V 5 2MLU LINK interface description MLU X1001 accelerator is equipped with 4 MLU290 M5 intelligent accelerating cards each card has 6 MLU LINK ports Among them 4 ports are used for internal interconnection and 2 port...

Page 18: ... MLU LINK connection reference The signal rate of MLU LINK is 50 Gbps and the cable loss is controlled within 10 dB 12 5GHz It is recommended to use 1 meter cable with a diameter of 30 AWG or 2 meter cable with a diameter of 28 AWG MLU LINK interface uses QSFP DD connectors whose pins are defined as follows Table 5 2 MLU LINK Interface pin definition QSFP DD pins Note Internal processing of ...

Page 19: ...D ResetL Reset signal low level effective 4 7 KΩ pull up to 3 3 V IntL Interrupt signal of optical module OC gate low level indicates an interrupt signal 4 7 KΩ pull up to 3 3 V InitMode Initialization mode 1KΩ pull down to GND VccRx VccRx1 Vcc1 Vcc2 VccTx VccTx1 Power signal 5 3Power Interface Description MLU X1001 accelerator Input Power Requirements Table 5 3 MLU X1001 Input Power Supply Specif...

Page 20: ...Cambricon Copyright 2020 Cambricon Corporation 17 ...

Page 21: ...ment Management of equipment model asset information and version information Status monitoring Real time monitoring of power supply temperature working status and other operating states information Heat dissipation control Modulate fan speed according to environment temperature equipment working load and abnormal conditions Alarm management Report the alarm information in real time and deal with i...

Page 22: ...ulation measures in advance MLU X1001 air volume description MLU X1001 can provide up to 360 CFM of air volume Do not block the front and rear ventilation areas of the chassis during operation of MLU X1001 When installing MLU X1001 please reduce the air resistance around the inlet and outlet of the chassis Please follow the instructions to arrange the cable to minimize the air resistance of the ai...

Page 23: ... resistance curve of MLU X1001 The system wind resistance curve of MLU X1001 is shown below Figure 7 1 Wind resistance curve of MLU X1001 Table 7 2 Air Volume VS Pressure Drop of MLU X1001 Air volume CFM Air pressure Pa 400 1737 360 1408 310 1044 260 735 0 0 ...

Page 24: ...igh Speed Cable MLU X1001 uses QSFP DD high speed cable for MLU LINK interconnection Compatible cable models are as follows Table 8 2 MLU X1001 MLU LINK Compatible Cable Manufacturers Model Specifications Molex 2015911012 1 m 30 AWG Molex 2015913020 2 m 28 AWG TE 2366016 4 1 m 30 AWG TE 2366101 3 2 m 28 AWG 8 3Network MLU X1001 can use InfiniBand network card or ROCE network card for cluster inter...

Page 25: ...22 Mellanox MCX653105A HDAT Half high and half long single PCIE 4 0 8 4Hard disk Compatible NVMe hard disk models for MLU X1001 are as follows Table 8 4 NVMe Hard Disk Compatibility Manufacturers Model Specifications HGST HUSMR7619BHP301 NVMe 1 92Tb ...

Page 26: ...r software to facilitate the rapid integration of the system NeuWare also provides a range of tools including application development function debugging performance tuning etc Among them application development tools include machine learning library runtime library compiler model retraining tool and specific field such as video analysis field SDK function debugging tools can meet different levels ...

Page 27: ...rt 15 of the FCC Rules These limits are designed to provide reasonable protection against harmful interference when the equipment is operated in a commercial environment This equipment generates uses and can radiate radio frequency energy and if not installed and used in accordance with the instruction manual may cause harmful interference to radio communications Operation of this equipment in a r...

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