15” Panel PC User’s Manual
P15
33
Address 1
34
No Connect
35
Address 0
36
Address 2
37
Chip Select 0
38
Chip Select 1
39
Activity
40
Ground
41
+5V
42
+5V
43
Ground
44
No
Connect
CMOS Setup Utility – Copyright © 1984 – 2001 Award Software
Advanced Chipset Features
DRAM Clock/Drive Control
AGP &P2P Bridge Control
CPU&PCI Bus Control
Memory Hole
System BIOS Cacheable
Video BIOS Cacheable
VGA Share Memory Size
Select Display Device
TV_type
TV_Connector
TV_Layout
Panel Type
Press Enter
Press Enter
Press Enter
Disabled
Enabled
Enabled
16M
CRT+LCD
NTSC
CVBS
Default
02
Item Help
_______________________
Menu Level
¾
↑↓←→
Move Enter: Select +/-/PU/PD: Value F10: Save
ESC: Exit F1: General Help
F5: Previous Values F6: Fail-safe defaults F7: Optimized
Defaults
y
Figure:
ID E 2
CPU Fan Connector: FAN1
Pin #
Assignment
1
Ground
2
+12V
3
Fan Status Signal
y
Figure:
FA N 1
LCD Panel Signal Pinout: JTTL1(24BIT)
Pin #
Assignment
Pin#
Assignment
1
B0
2
B1
3
B2
4
B3
5
G4
6
G5
7
R2
8
R3
9
B4
10
B5
11
B6
12
B7
13
G6
14
G7
15
R4
16
R5
17
G0
18
G1
19
G2
20
G3
21
R0
22
R1
23
R6
24
R7
25
ENPVDD
26
Data
Clock
27
ENPVEE
28
Data
Enable
29
FPBKLP
30
H-Sync
System BIOS Cacheable:
Selecting “Enabled” allows caching of the system BIOS ROM at
F0000h-FFFFFh, resulting in better system performance. However, if any
program writes to this memory area, a system error may result.
The choice: Enabled, Disabled.
Video RAM Cacheable:
P42
15” Panel PC User’s Manual
