BI94GS-IAB
41
North Bridge Configuration
BIOS SETUP UTILITY
Chipset
vxx.xx (C)Copyright 1985-200x, American Megatrends, Inc.
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North Bridge Chipset Configuration
Configure DRAM Timing by SPD [Enabled]
DRAM CAS# Latency [5]
DRAM RAS# to CAS# Delay [6 DRAM Clocks]
DRAM RAS# Precarge [6 DRAM Clocks]
DRAM RAS# Activate to Precha [15 DRAM Clocks]
Memory Hole [Disabled]
Boots Graphic Adapter Priority [PCI/IGD]
Internal Graphics Mode Select [Enabled,8MB]
> Video Function Configuration
DRAM Frequency [Auto]
Options
Auto
400 Mhz
533 Mhz
DRAM Frequency
This item allows you to set the frequency of DRAM.
Options: Auto (Default) / 400MHz / 533MHz
Configure DRAM timing by SPD
This item allows you .to determine DRAM timing by SPD
Options: Enabled (Default) / Disabled
DRAM CAS# Latency
Options: 5 (Default) / 4 / 3
DRAM RAS# to CAS# Delay
Options: 6 DRAM Clocks (Default) / 2 ~ 7DRAM Clocks
DRAM RAS# Precharge
Options: 6 DRAM Clocks (Default) / 2 ~ 7DRAM Clocks
