Plexus 9000 Planning and Engineering Guide
DS3 ATM Network Access Module
Section 130-120-800
Issue 1, April 23, 2004
Telica, Inc.
5-201
5.18.3.6
MLBA and Local Control Circuitry
The MLBA and Local Control implements the maintenance link
functionality of the MLBA (Maintenance Link Bus Adapter), which
provides a serialized point-to-point interconnect between the SF module
and each Network Access module and its microprocessor. This link is
used to reset a module, detect CLEI code, control the LEDs located on the
module, download images to the processor’s memory, program the circuit
switch registers and communicate operational status to the SP. It also
provides a bridge between the PCI bus and the non-PCI-bus-based
peripherals, such as the Framer and the APC devices.
It also contains various registers that provide hardware local hardware
control and status for the module.
5.18.3.7
Microprocessor, Memory Bus Controller and Memory
The processor section has a microprocessor with memory and a
microprocessor controller, which provides interfaces between the
microprocessor and memory, MLBA and SAR. Each module also has an
EEPROM that contains the CLEI code for the module.
5.18.3.8
Segmentation and Reassembly (SAR)
There is a stand-alone AAL5 Segmentation and Reassembly (SAR) unit
on the PCI bus of each module to provide the microprocessor a means of
communication to the SF module. The SAR generates and terminates
ATM traffic as well as automatically scheduling cells for transmission.
The SAR is also connected to the APC over a Utopia bus.
5.18.3.9 Power
Each DS-3 ATM Network Access module has its own DC-to-DC
converter (not shown), which converts the 48 volts supplied from the
backplane to the local voltages required (5Vdc, 3Vdc, etc.).
5.18.3.10
Clocks and Synchronization
Clock and framing information is received from the System Timing
module located on the SP. The clock control circuitry of the IOM
distributes these on the module.