Block Diagram
29
Max 101830
CTL_BOARD
06.MCU
H
FS
H
C
LK
G
M
_R
ST
IR
Q
n
MCU_SCL
MCU_SDA
G
M
_I
R
Q
IN
n
PANEL_PWR_CTL
MEM_SW
LIGHT_BRI_CTL
LIGHT_PWR_CTL
DSUB_+5V
GM_VS
GM_HS
M
C
U
_V
S
M
C
U
_H
S
VIDEO_SW
DVI_+5V
DVI_CA
DSUB_CA
H
D
AT
A0
H
D
AT
A1
H
D
AT
A2
H
D
AT
A3
+5V
+3.3V
SYNC
POWER_SW
LVDS_SW
PANEL_CABLE
02.MUX
VIDEO_SW
GM_G
GM_B
GM_R
GM_VS
GM_HS
X [0..9] : [DSUB DVI] [RGBHV]
+5
V
POWER_SW
SYNC
05.LVDS
LVDS_CLK
LVDS_HS
LVDS_VS
LVDS_EN
X [0..47] : LVDS [EO] [RGB] [0..7]
+3
.3
V
+1
2V
+5
V
PA
N
EL
_P
W
R
_C
TL
LV
D
S_
SW
DSUB_CABLE
PWR_BOARD
PWR_WIRE
DVI_CABLE
04.MEM
(reserved)
MEM_DATA [0..47]
MEM_ADD [0..11]
/RAS
DQM0
MEM_CLK
/WE
DQM1
/CAS
CKE
+3
.3
V
MEM_SW
PANEL
03.GM
IR
Q
n
G
M
_R
ST
MEM_ADD [0..11]
H
FS
G
M
_I
R
Q
IN
n
GM_R
GM_G
GM_B
GM_HS
H
C
LK
H
D
AT
A0
H
D
AT
A1
H
D
AT
A2
H
D
AT
A3
MEM_DATA [0..47]
DQM1
DQM0
MEM_CLK
CKE
/RAS
/CAS
/WE
LVDS_EN
GM_VS
LVDS_VS
LVDS_HS
LVDS_CLK
X [0..7] : TX [012C] [+-]
X [0..47] : LVDS [EO] [RGB] [0..7]
+5
V
M
C
U
_H
S
M
C
U
_V
S
07.PWR
LIGHT_PWR_CTL
LIGHT_BRI_CTL
+5
V
+3
.3
V
+1
2V
CTL_WIRE
PC
01.PC
MCU_SDA
MCU_SCL
DSUB_+5V
DVI_+5V
DVI_CA
DSUB_CA
X [0..7] : TX [012C] [+-]
X [0..9] : [DSUB DVI] [RGBHV]
+5
V
Summary of Contents for 101830
Page 30: ...9 Go to cover page 30 Max 101830 Schematic diagram Power...
Page 32: ...Power Board C B A 31 Max 101830 Go to cover page...
Page 33: ...9 Go to cover page 32 Max 101830 Schematic diagram Video Input Schematic diagram DC_Powers...
Page 35: ...9 Go to cover page 34 Max 101830 Schematic diagram Scaler...
Page 36: ...9 Go to cover page 35 Max 101830 Schematic diagram Frame_Beffer...
Page 43: ...Inverter Diagram PWB AMBIT 9 Go to cover page 42 Max 101830...
Page 44: ...43 Max 101830 Go to cover page Inverter Diagram PWB AMBIT...
Page 45: ...44 Max 101830 Go to cover page Schematic diagram Control...
Page 53: ...52 Max 101830 Go to cover page CA110 Application Continued...
