REF: BBONEBLK_SRM
BeagleBone Black System
Reference Manual
Rev A5.2
Page 92 of 108
8.3
Pin Usage Consideration
This section covers things to watch for when hooking up to certain pins on the expansion
headers.
8.3.1
Boot Pins
There are 16 pins that control the boot mode of the processor that are exposed on the
expansion headers.
Figure 56
below shows those signals:
R
80
100K,
1%
R
81
100K,
1%
R
82
100K,
1%
R
83
100K,
1%,
D
N
I
R
100
42.
2K,
1%,
D
N
I
R
101
42.
2K,
1%,
D
N
I
R
102
42.
2K,
1%,
D
N
I
R
103
42.
2K,
1%
R
104
42.
2K,
1%,
D
N
I
R
106
42.
2K,
1%
R
107
42.
2K,
1%
R
84
100K,
1%
R
108
42.
2K,
1%
R
110
42.
2K,
1%
R
109
42.
2K,
1%
R
112
42.
2K,
1%
R
111
42.
2K,
1%
R
114
42.
2K,
1%,
D
N
I
R
113
42.
2K,
1%
R
105
42.
2K,
1%
R
115
42.
2K,
1%
R
86
100K,
1%,
D
N
I
R
87
100K,
1%,
D
N
I
R
88
100K,
1%,
D
N
I
R
89
100K,
1%,
D
N
I
R
90
100K,
1%,
D
N
I
VDD_3V3A
R
91
100K,
1%,
D
N
I
R
92
100K,
1%,
D
N
I
SYS_BOOT10
SYS_BOOT9
SYS_BOOT8
SYS_BOOT15
SYS_BOOT14
SYS_BOOT13
SYS_BOOT12
SYS_BOOT11
R
93
100K,
1%,
D
N
I
SYS_BOOT4
Boot Configuration
SYS_BOOT2
SYS_BOOT1
SYS_BOOT0
SYS_BOOT7
SYS_BOOT6
SYS_BOOT5
SYS_BOOT3
R
94
100K,
1%
R
95
100K,
1%,
D
N
I
R
85
100K,
1%,
D
N
I
DGND
GPIO2_11
11,4
GPIO2_10
11,4
GPIO2_9
11,4
UART5_TXD
11,4
GPIO2_13
11,4
GPIO2_12
11,4
UART3_RTSN
11,4
UART3_CTSN
11,4
UART5_RXD
11,4
UART5_CTSN
11,4
UART4_RTSN
11,4
UART4_CTSN
11,4
GPIO2_7
11,4
GPIO2_6
11,4
UART5_RTSN
11,4
GPIO2_8
11,4
Figure 56.
Expansion Boot Pins
If you plan to use any of these signals, then on power up, these pins should not be driven.
If you do, it can affect the boot mode of the processor and could keep the processor from
booting or working correctly.
If you are designing a cape that is intended to be used as a boot source, such as a NAND
board, then you should drive the pins to reconfigure the boot mode, but only at reset.
After the reset phase, the signals should not be driven to allow them to be used for the
