REF: BBONEBLK_SRM
BeagleBone Black System
Reference Manual
Rev A5.2
Page 84 of 108
issues, you need to gate this signal with RESET, when the data is sampled. After
reset goes high, the signal should be removed from the pin.
BEFORE
the SW reinitializes the pins, it
MUST
put the eMMC in reset. This is done by
taking eMMC_RSTn (GPIO1_20) LOW. This pin does not connect to the expansion
header and is accessible only on the board.
DO NOT
automatically drive any conflicting pin until the SW enables it. This puts the
SW in control to insure that the eMMC is in reset before the signals are used from the
cape.
8.2
EEPROM
Each cape must have its own EEPROM containing information that will allow the SW to
identify the board and to configure the expansion headers pins as needed. The one
exception is proto boards intended for prototyping. They may or may not have an
EEPROM on them. An EEPROM is required for all capes sold in order for them operate
correctly when plugged into the BeagleBone Black.
The address of the EEPROM will be set via either jumpers or a dipswitch on each
expansion board.
Figure 54
below is the design of the EEPROM circuit.
The EEPROM used is the same one as is used on the BeagleBone and the BeagleBone
Black, a CAT24C256. The CAT24C256 is a 256 kb Serial CMOS EEPROM, internally
organized as 32,768 words of 8 bits each. It features a 64−byte page write buffer and
supports the Standard (100 kHz), Fast (400 kHz) and Fast−Plus (1 MHz) I
2
C protocol.
R
12
8
4.
75
K
DGND
R
13
8
4.
75
K
R
14
2
4.
75
K
VDD_3V3
VDD_3V3
R
22
1
5.
6K
,5
%
R
22
0
5.
6K
,5
%
SW1
SW DIP-2
I2C2_SDA
2,4,6
I2C2_SCL
2,4,6
DGND
U18
CAT24C256W
A0
1
A1
2
A2
3
SCL
6
SDA
5
VCC
8
VSS
4
WP
7
SW1_A3
SW1_A1
SW1_A0
C130
0.1uF
1
2
Figure 54.
Expansion Board EEPROM Without Write Protect
The addressing of this device requires two bytes for the address which is not used on
smaller size EEPROMs, which only require only one byte. Other compatible devices may
