182
YUV 6
R/Cr/Pr
Output
4MA, SR
1) Video data output bit 6
2) Red or CR
181
VSYN
V_ADIN1
Output
4MA, SR
1) Vertical sync input/output
2) While no External TV-encoder:
I) Vertical sync for video-input
II) Version AD input port 1
III) GPIO
180
YUV 7
INT3#
ASDATA
5
Output
4MA, SR
1) Video data output bit 7
2) While no External TV-encoder:
I) Microcontroller external interrupt 3
II) Audio serial data 5 part II : DSD data sub-woofer
channel or Microphone output
III) GPIO
179
HSYN
INT4#
V_ADIN2
Output
4MA, SR
1) Horizontal sync input/output
2) While no External TV-encoder:
I) Horizontal sync for video-input
II) Version AD input port 2
III) GPIO
IV) Microcontroller external interrupt 4
Video Interface (12)
160
DACVDDC
Power
3.3V power pin for video DAC circuitry
161
VREF
Analog
Bandgap reference voltage
162
FS
Analog
Full scale adjustment
163
DACVSSC
Ground
Ground pin for video DAC circuitry
164
CVBS
InOut 4mA,
SR
Analog composite output
165
DACVDDB
Power
3.3V power pin for video DAC circuitry
166
DACVSSB
Ground
Ground pin for video DAC circuitry
167
DACVDDA
Power
3.3V power pin for video DAC circuitry
168
Y/G
InOut 4mA,
SR
Green, Y, SY, or CVBS
169
DACVSSA
Ground
Ground pin for video DAC circuitry
170
B/CB/PB
InOut 4mA,
SR
Blue, CB/PB, or SC
171
R/CR/PR
InOut 4mA,
Red, CR/PR, CVBS, or SY
- 65 -
Summary of Contents for DV718SI
Page 1: ...service manual DV718SI...
Page 56: ...21 27M clock signal waveform diagram 22 Reset circuit waveform diagram URST Dv33 52...
Page 92: ...5 1 3 Surface layer of DECODE SERVO Board 88...
Page 93: ...5 1 4 Bottom layer of DECODE SERVO Board 89...
Page 95: ...C744 C750 C745 C753 C738 C737 C739 C743 C742 C740 C747 5 1 6 Bottom layer of HDMI Board 91...