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7. Electronic parts and servicing procedures
Image 7-139
Preformatter: rear side
Image 7-140
Preformatter: front side
Schematic overview
Altera
CYCLONE2
Xilinx
FPGA
1 (J100)
2 (J101)
3 (J102)
RAM
EID (J400)
PREFORMATTER
Data inputs
RGB
LVDS
RGB, VS, HS
DATA LVDS + control
DATA LVDS + control
DATA LVDS + control
LVTTL
RGB, VS, HS
I2C
RS232
loadboot
reset
PROG
PWR OK?
PWR good IN
not configured
PWR good OUT
12V (J11)
12V to
DC/DC
2V5, 1V8, 1V2
configuration
PWR good
not configured
PWR R (J7)
PWR B (J9)
CPLD
FLASH
PWR input
PWR output
PWR G (J8)
DATA R (J1-2)
DATA G (J3-4)
DATA B (J5-6)
Data outputs
RGB
Image 7-141
Preformatter: block diagram
Start sequence
When the projector switches from standby state to active state,
fi
rst the lamp is lit and then the formatter is powered. If all voltages
are present and good, the POWER GOOD IN is activated (green LED) and con
fi
guration of the FPGA (Cyclone) starts. When this
con
fi
guration has been
fi
nished succesfully, the POWER GOOD OUT is activated and the Texas Instruments FPGAs are getting
con
fi
gured.
7.13.2 Diagnostics of the preformatter
Measuring voltages
The following voltages can be checked on the formatter board:
•
mains power supply: +12V
•
derived voltages: 3.3V — 2.5V — 1.8V — 1.2V
102
R59770141 GALAXY NH-12 20/02/2008
Summary of Contents for Galaxy NH-12
Page 1: ...Galaxy NH 12 Service manual R9040400 R59770141 00 20 02 2008...
Page 4: ......
Page 12: ...1 Safety guidelines 8 R59770141 GALAXY NH 12 20 02 2008...
Page 42: ...6 Projector layout 38 R59770141 GALAXY NH 12 20 02 2008...
Page 142: ...8 Optical parts and servicing procedures 138 R59770141 GALAXY NH 12 20 02 2008...