VIA 693A ATX
MAINBOARD
AWARD BIOS SETUP
4-6
4.6
CHIPSET FEATURES SETUP
ROM PCI / ISA BIOS (2A69LGXXX)
CHIPSET FEATURES SETUP
AWARD SOFTWARE, INC.
Bank 0/1 DRAM Timing
:SDRAM 8/10ns Auto Detect DIMM/PCI Clk : Enabled
Bank 2/3 DRAM Timing
:SDRAM 8/10ns Spread Spectrum
: Disabled
Bank 4/5 DRAM Timing
:SDRAM 8/10ns CPU Host PCI/Clock
: Default
EDO RASx# Wait State
: 2
SDRAM Cycle Length
: 3
DRAM Clock
: Host CLK
Memory Hole
: Disabled
Read Around Write
: Disabled
Concurrent PCI / Host
: Disabled
System BIOS Cacheable
: Disabled
Video RAM Cacheable
: Disabled
AGP Aperture Size (MB)
: 64
AGP-2X Mode Time
: Enabled
ESC : Quit
↑↓→←
:
Select Item
OnChip USB
: Enabled
F1 : Help
PU/PD/+/- : Modify
USB Keyboard Support
: Disabled
F5 : Old Values
(Shift)F2 : Color
F7 : Load Setup Defaults
WARNING :
The selection fields on this screen are provided for the professional
technician who can modify the Chipset features to meet some specific
requirement. If you do not have the related technical background, do
not attempt to make any change except the following items.
BANK0/1, 2/3, 4/5 DRAM Timing:
This item allows you to select the value in this field, depending on whether the
board has paged DRAMs or EDO (extended data output) DRAMs.
SDRAM Cycle Length
When synchronous DRAM is installed, the number of clock cycles of CAS latency
depends on the DRAM timing. Do not reset this field from the default value
specified by the system designer.
DRAM Clock
This selecting option allows you to control the DRAM speed.
