SHB150R LGA1151 Full-size CPU Card
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Watchdog Timer
Appendix A
Watchdog Timer
A.1 About Watchdog Timer
Software stability is a major issue in most applications. Some embedded systems are not
watched by humans for 24 hours. It is usually too slow to wait for someone to reboot when
computer hangs. The systems need to be able to reset automatically when things go wrong.
The watchdog timer gives us that solution.
The watchdog timer is a counter that triggers a system reset when it counts down to zero from
a preset value. The software starts the counter with an initial value and must reset it
periodically. If the counter ever reaches zero which means the software has crashed, the
system will reboot.
A.2 How to Use Watchdog Timer
Start
Un-Lock WDT:
O 2E 87 ; Un-lock super I/O
O 2E 87 ; Un-lock super I/O
Select Logic device:
O 2E 07
O 2F 08
Set Second or Minute:
O 2E F0
O 2F N ; N=00 or 08 (See
Note
below)
Set base timer:
O 2E F1
O 2F M ; M
=00,01,02,…FF(Hex) ,Value=0 to 255
WDT counting re-set timer:
O 2E F1
O 2F M ; M=00,01,02
,…FF (See
Note
below)
IF No re-set timer:
; WDT time-out, generate RESET
;IF to disable WDT:
O 2E 30
O 2F 00 ; Can be disabled at any time
Timeout Value Range
1 to 255
Minute / Second
